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Abhishek Chugh

D1C Sort Product Engineer @ Intel Corporation

Automation Engineer at Intel Corporation

Portland, Oregon Area

Ranked #68 out of 1,365 for D1C Sort Product Engineer in Oregon

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Abhishek Chugh's Email Addresses & Phone Numbers

Abhishek Chugh's Work Experience

Intel Corporation

D1C Sort Product Engineer

February 2014 to June 2015

Portland, Oregon Area


Reliability Test Engineer Intern,Technology Reliability Development

May 2013 to August 2013


National Physical Laboratory


June 2011 to August 2011

New Delhi Area, India

Abhishek Chugh's Education

Texas Tech University

Master of Science (MS) Electrical Engineering 4.0

2012 to 2013

Maharshi Dayanand University

Bachelor of Technology (B.Tech.) Electrical Electronics and Communications Engineering

2008 to 2012

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About Abhishek Chugh's Current Company

Intel Corporation

• Sort sustaining and development in support of 300mm logic products in a high volume manufacturing environment -Working with Sort Product Development Engineering (PDE) on developing stable and effective sort test coverage including supporting test planning and debug activities. - Working with Sort Module Engineers and Sort Integration on helping to resolve product specific issues and sensitivities....

Frequently Asked Questions about Abhishek Chugh

What company does Abhishek Chugh work for?

Abhishek Chugh works for Intel Corporation

What is Abhishek Chugh's role at Intel Corporation?

Abhishek Chugh is D1C Sort Product Engineer

What is Abhishek Chugh's personal email address?

Abhishek Chugh's personal email address is ab****[email protected]m

What is Abhishek Chugh's business email address?

Abhishek Chugh's business email address is a****[email protected]

What is Abhishek Chugh's Phone Number?

Abhishek Chugh's phone (503) ***-*281

What industry does Abhishek Chugh work in?

Abhishek Chugh works in the Semiconductors industry.

Who are Abhishek Chugh's colleagues?

Abhishek Chugh's colleagues are Jas Bhogal, Lukasz Migas, Nick Ballinger, Pete Logan, Abhinav Ganesh, Meetkumar Patel, Stephen Spence, Daming Wei, Darshan Kadia, and Max Ebnother

About Abhishek Chugh

📖 Summary

 Currently working as Automation Engineer, Assembly/Test Technology Development, Intel Corporation, OR  Previous Experience as Sort Product Engineer, Intel Corporation, OR & Reliability Test Engineer at GlobalFoundries, NY.  BS and MS in Electrical Engineering with GPA 4.0  Experience with Automated Test Equipments, Wafer Level Reliability Testing and Component Level testing , New Product Introduction, Product Binning , Product health indicators  Statistical Data analysis : Excel, JMP  Programming Skills: C, C# , VBA, Labview , PERL, SQL, JSL, SAS  Familiarity with of SPC; Process Capability and Six Sigma concepts  Engineer in Training Certification – April 2013  Flexible, proactive, quick learner and detail–oriented.D1C Sort Product Engineer @ • Sort sustaining and development in support of 300mm logic products in a high volume manufacturing environment -Working with Sort Product Development Engineering (PDE) on developing stable and effective sort test coverage including supporting test planning and debug activities. - Working with Sort Module Engineers and Sort Integration on helping to resolve product specific issues and sensitivities. - Working with Technology Development, Quality & Reliability Engineering, and Yield Analysis engineering on product/process yield issues and optimization. - Interacting with Process Engineering and manufacturing organizations to drive NPI (New Product Introduction) improvement and efficiencies. - Working with Product Development Team (PDTs) on product schedules and product optimizations. - Analyze and monitor product health indicators (yield, test time, resort rate), product binning, contact resistance, to ensure product stability at sort. Escalate and drive root cause understanding of excursions. - Ownership and sustaining support of Intel sort software / Hardware applications Software Development : Have played a key role in Developing, improving and maintaining all Scripts at D1C Sort and also developed Scripts for Virtual Factory. Currently owns 15 Scripts out of which 11 were developed from start. Scripting :VBA, VBS, SQL, JSL , C# Data Analysis : JMP/Jsl, Excel Automation : using C#, JSL, VBA Award : Post Silicon Team Excellence Divisional Award - In recognition of high quality and tech readiness which enabled an exceptionally smooth product power on, and was declared "Best in Class"​ in the industry by the company's VP View From February 2014 to June 2015 (1 year 5 months) Portland, Oregon AreaReliability Test Engineer Intern,Technology Reliability Development @ • 20nm /14nm Wafer Level Reliability Testing: . -Executed Test requests directly from Reliability Engineers for BTI analysis . -Delivered on-time and quality data to internal customers for early reliability analysis. . -Macro Validation for new technologies . -Cross-module communication for inputs and suggestion. . -Indirect tool ownership and responsibility. . - Tool qualification (data : JMP,Excel) Hands on Experience: Probe Stations; Accretech UF , Cascade Elite , Agilent SMU/ Switching Matrix • Test Development: . - Fixed bugs in the original macro for correct data analysis (VBA, Excel) . - Amended new features to existing data analysis macro’s for increased data throughput (VBA, Excel) . - Designed a Wafer Map Generator for Parallel BTI Automation (using C#) . - Designed a Prototype generator to analyze failure patterns for TDDB (using VBA, Excel) From May 2013 to August 2013 (4 months) Malta,NYIntern @ Work involved synthesis of multiferroic BiFeO3 material by different techniques namely by Solid Sate, Autocombustion, Sol-Gel and Co-precipitation routes. Comparative study was done to appraise the best method out of these four. The results (characterization through XRD, VSM, and LCR Meter) are obtained separately for each route, and then a comparison is developed to find out the pertinent method for preparing BFO. Apart from identifying the best method , other purpose of this project is to (1) synthesize a pure phase material (2) achieving sintering densities over 90% (3) Material with good dielectric and magnetic properties. From June 2011 to August 2011 (3 months) New Delhi Area, IndiaMaster of Science (MS), Electrical Engineering, 4.0 @ Texas Tech University From 2012 to 2013 Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering @ Maharshi Dayanand University From 2008 to 2012 Abhishek Chugh is skilled in: Labview, JMP, Testing, C++, Simulations, AutoCAD, Semiconductor Device, Perl, Semiconductors, C, Characterization, SPC, Reliability Test, SEM, Silvaco, Scanning Electron..., Microsoft Excel, VBA, Test Program Development, C#, WPF Development, WCF, SECS/GEM

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In a nutshell

Abhishek Chugh's Personality Type

Introversion (I), Intuition (N), Thinking (T), Judging (J)

Average Tenure

0 year(s), 8 month(s)

Abhishek Chugh's Willingness to Change Jobs



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There's 93% chance that Abhishek Chugh is seeking for new opportunities

Abhishek Chugh's Achievements

Best Student Volunteer Award

Issued by IEEE Delhi Section · March 2011

Dr. J.K Pal Memorial Award

Issued by IEEE Delhi Section · February 2012

Texas Tech University Raymond Coffman ENGR Scholarship (Fall2013)

Issued by - · August 2013

TTU Seacat EE Scholarship

Issued by Texas Tech University, EE Department · August 2012

Post Silicon Team Excellence Divisional Award

Issued by Intel Custom Foundry · November 2014

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