SAPM, Stanford Advanced Project Management @
Seasoned engineer with strong Big Data Infrastructure\Systems\Mobile\Performance technical backgrounds and Project Management skills. Big Data Infrastructure: Spark, Tachyon, Heterogeneous Computing, and Distributed Deep Learning. Systems: PhD in computer engineering, extensive experiences with High-Performance Computer Systems, OS kernel, embedded systems, and Java Virtual Machines. Mobile: experiences with Windows Phone, iOS, and Android application platforms. Performance: performance, reliability, and
Seasoned engineer with strong Big Data Infrastructure\Systems\Mobile\Performance technical backgrounds and Project Management skills. Big Data Infrastructure: Spark, Tachyon, Heterogeneous Computing, and Distributed Deep Learning. Systems: PhD in computer engineering, extensive experiences with High-Performance Computer Systems, OS kernel, embedded systems, and Java Virtual Machines. Mobile: experiences with Windows Phone, iOS, and Android application platforms. Performance: performance, reliability, and energy efficiency projects done at different levels of the hardware\software stack. Project Management: project management education from Stanford, initiated and drove multiple software development and performance projects to successful completion.
Senior Architect @ • Interactive Query Engine: developed a core interactive query engine based on Spark SQL and Tachyon. Compared to the original system, we achieved 30x speedup with the new system. (https://www.oreilly.com/ideas/accelerating-big-data-analytics-workloads-with-tachyon).
• Heterogeneous Computing Platform: initiated Baidu’s effort of integrating heterogeneous computing (GPU, FPGA) into big data infrastructure. Developed a heterogeneous computing layer to abstract hardware resources and integrated the layer into Baidu’s Spark ecosystem.
• Distributed Deep Learning Platform: integrated Baidu’s Deep Learning Platform into Spark ecosystem.
• Tachyon: open-source contributions to Tachyon (http://tachyon-project.org/). From June 2014 to Present (1 year 7 months) Senior Software Engineer @ • Business Intelligence Engine Optimization: responsible for performance optimization of Pinot, a LinkedIn internal business intelligence engine built on top of SenseiDB. Optimized the memory-mapped database to have similar performance as the in-memory database. Identified the optimal memory usage for the memory-mapped database without sacrificing performance.
• LinkedIn Android and iOS Flagship Applications Performance Optimization: studied LinkedIn flagship applications; identified and root-caused launch and scroll performance bottlenecks; prototyped and shipped performance improvement patches that improved launch time by 50%.
• Mobile Client Performance Framework Development: developed end-to-end performance test automation frameworks for LinkedIn mobile client applications. The framework initiates performance test suite at each check-in, automatically analyzes test results, and passes\fails the check-in based on whether performance regression problem is identified. From November 2013 to June 2014 (8 months) Software Development Engineer II @ • Boot and Shutdown Performance: developed tools to investigate Windows Phone devices boot and shutdown performance; studied driver and service behaviors in boot and shutdown; identified performance bottlenecks in boot and shutdown and implemented optimization mechanisms.
• Memory Optimization: developed tools to characterize Windows Phone devices memory utilization under different scenarios; collected and studied memory usage data from lab runs as well as real-world device; conducted memory usage analysis and implemented memory usage optimization mechanisms.
• Power Consumption Optimization: developed a driver to collect Windows Phone devices per-rail power consumption based on ARM CoreSight; collected and studied component-based (Bluetooth, WIFI, CPU, GPU, display etc.) energy consumption and proposed optimization strategies.
• Storage Performance Optimization: developed tools to stress the storage sub-system of Windows Phone devices (eMMC and micro-SD); studied storage impact on key performance scenarios, such as boot and shutdown. From March 2010 to October 2013 (3 years 8 months) Research Intern @ • Energy Efficiency of Reconfigurable Systems: characterized the power consumption behaviors of reconfigurable computing platforms. Designed and implemented fast reconfiguration mechanisms on Xilinx Virtex-4 FPGA platforms. From June 2009 to September 2009 (4 months) Research Intern @ • Speculative Execution on GPUs: examined data patterns of large scale Lattice Quantum-ChromoDynamic (LQCD) simulations. Exploited the potential of value prediction techniques to reduce communication overhead of LQCD simulations. Designed and implemented value prediction and speculation framework on GPGPUs. From February 2009 to June 2009 (5 months) FranceResearch Intern @ • High-Performance Parallel Garbage Collector: implemented parallel garbage collection algorithms in Apache Harmony Java Virtual Machine. Evaluated the performance and scalability of the parallel garbage collectors on a 16-core machine. Designed and implemented load balance algorithms for the parallel garbage collectors From June 2008 to September 2008 (4 months) Beijing City, ChinaDevice Verification and Test Engineer @ • Hardware Device Verification and Test: constructed programs to automate tests of electrical properties and functions of chips. Built user-friendly graphic interface to encapsulate these test automation programs. Conducted functional and performance tests on the analog front end of chips. Generated test reports and presentations to the system design team. From November 2006 to August 2007 (10 months)
SAPM, Stanford Advanced Project Management @ Stanford University From 2014 to 2014 PhD, Computer Engineering @ University of California, Irvine From 2005 to 2010 M.S., Biomedical Engineering @ University of California, Irvine From 2006 to 2007 M.S., Computer Systems and Software @ University of California, Irvine From 2005 to 2006 B.S., Computer Engineering @ University of California, Irvine From 2002 to 2005 Shaoshan Liu is skilled in: Operating Systems, Computer Architecture, Performance Analysis, FPGA, DirectX, Firmware, Windows Driver Development, C++, ARM, MPI, C, Hadoop, Perl, Image Processing, Software Development
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