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Robert Grygiel Contact Details

San Francisco Bay Area
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Innovative, versatile ASIC designer versed in all aspects of the IC design flow. Skilled at physical design, design-for-test ( DFT ) and logic design in a wide range of settings. Enviable record of efficiency and cost containment through schedule risk management, first-pass silicon success and high-yielding designs. Collaboration with vendors to ensure quality and completeness of custom 

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