Currently working on BURST development, a tool used to verify ARM based CPUs. Technical experience includes: - Utilizing verification methodologies (OVM) - Test bench development in C++/SystemVerilog/Specman - Object Oriented Programming - Scripting (Unix, Perl, Python) - Test plan development - Computer architecture - RTL design

Validation Engineer @ From February 2015 to Present (9 months) Design Verification Engineer @ Worked in Pre-Si full chip verification on server CPU's (10 nm and 14 nm product lines). Some work I did: 1) Proposed and implemented a reset driver framework using OVM which will be used across multiple SoCs and IPs. 2) Verified cross product power management and random transaction flows. 3) Drove bring up of new test environments for DUTs including bring up of verification tools and implementation of initial test cases. 4) Developed a scalable power control unit (PCU) BFM used to validate power flows to 5 different IPs From June 2011 to February 2015 (3 years 9 months) Santa Clara, CADesign Verification Engineer @ Worked in Pre-Si verification on a 1/10/40/100Gbps Ethernet stub ASIC 1) Wrote test cases using VMM methodology 2) Debugged/Fixed various environment problems in the reference model (SystemC) and test bench (SystemVerilog). From September 2010 to June 2011 (10 months) San Jose, CADesign Verification Intern @ Worked in Pre-Si verification on a 1/10/40/100Gbps Ethernet stub ASIC. 1) Developed test bench components (drivers/monitors/checkers). 2) Enhanced a performance monitor component to successfully keep track of performance on a per port basis. From June 2010 to August 2010 (3 months) San Jose, CATest Engineer Co-op @ Worked as part of a team doing initial board bring up work on Cisco's most complex product (CRS-1) 1) Debugged, tested and allocated prototype router hardware. 2) Maintained a database to monitor distribution of test boards. 3) Developed automated testing scripts for testing boards using tcl. From June 2008 to May 2010 (2 years) San Jose, CA

Bachelors of engineering, Electrical Engineering @ University of Michigan From 2004 to 2009 Rahul Ramaswami is skilled in: Debugging, SystemVerilog, ASIC, Verilog, Hardware, Computer Architecture, Specman, Processors, TCL, Intel, C, Perl, Embedded Systems, Testing, VLSI, VMM, Scripting, SystemC, Functional Verification, RTL Design, C++, OOP, FPGA, Circuit Design, Verdi, Open Verification..., SoC, Microprocessors, VHDL, Hardware Architecture, Power Management, Semiconductors, Linux, IC, Public Speaking, Leadership, Mentoring, Unix, Python, Test Planning, Logic Design, Integration