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Manuel Muro

VP of Engineering

VP of Engineering at VEFXi

Portland, Oregon Area

Section title

Manuel Muro's Email Addresses & Phone Numbers

Manuel Muro's Work Experience


VP of Engineering

February 2014 to June 2015

Northwest Logic

Verification & Design Engineering Consultant

May 2012 to February 2014


FPGA RTL Design Engineering Consultant

August 2011 to February 2012

Manuel Muro's Education

Florida Institute of Technology

MSEE Electrical Engineering

1997 to 1999

North Carolina State University

BSEE Electrical Engineering

1989 to 1995

Hialeah Miami Lakes

1987 to 1989

About Manuel Muro's Current Company


Responsible for the mapping of the company's 3rd generation 2D-to-3D video conversion algorithm into an FPGA and shortly there after into an ASIC which will provide real-time conversion of any 2D video source into 3D that can drive 3D TVs that require no glasses!

About Manuel Muro

📖 Summary

* Processor IP System Level Integration * Processor IP Negotiation and Contract Review * System Level Architecture (Memory and Bus Architectures) * Micro-Architecture * Verilog RTL Coding * Verification and Testbench Development * Mixed Signal System Design (Audio, Video or Communications) * VLSI Design (GDSII through Standard Cell Library Design) * Advanced Design Automation Tools and Techniques (Automatic Register RTL Code Generation) * Data Converters * Wireless USB / USB * WiMedia Standard * UVM/OVM Verification * 3D Image and Video Stereoscopy via active, passive or no glasses technlogy * 2D to 3D Image and Video Conversion Specialties: Verilog 2K & SystemVerilog (Design & Verification Aspects) Microprocessors IP Acquisition and Integration A/D and D/A Architectures and Concepts DSP Systems Network/Data Packet Processing 3D Stereocopy Artifical Neural Networks (ANN) Machine Learning (ML)VP of Engineering @ Responsible for the mapping of the company's 3rd generation 2D-to-3D video conversion algorithm into an FPGA and shortly there after into an ASIC which will provide real-time conversion of any 2D video source into 3D that can drive 3D TVs that require no glasses! From February 2014 to June 2015 (1 year 5 months) Verification & Design Engineering Consultant @ * Integrated OVM/UVM based SystemVerilog Verification IP (VIP) for both MIPI-DSI Host and Peripheral IP * Developed PCIe DMA controller tests along with setting up nightly regressions. * Worked on automated register RTL code generation and other intrastructure processes From May 2012 to February 2014 (1 year 10 months) FPGA RTL Design Engineering Consultant @ Carrying out design and verification work for the J750 testers, particularly the DC control subsystems, parametric testing unit and the connection manager. From August 2011 to February 2012 (7 months) Electrical System Architecture Consultant @ Working on the development of a portable ultrasound system. From March 2011 to December 2011 (10 months) CEO, CTO, Founder @ Initially developing a novel MAC IP block that is a highly enabling technology for standard or custom communication packet protocols. Since June 2010, the MAC IP development has been on hold and the focus has shifted to developing an innovative fitness monitor system that will provide full fitness analytics such as distances (in all dimensions), simple/complex rep counting, heart rate, oxygen level and body core temperature without GPS technology, while being usable during any fitness event or exercise including swimming (in pools or open water). With the ability to easily expand to team sports too. From December 2008 to December 2011 (3 years 1 month) Silicon Validation Engineer Consultant @ Exercising different modules and aspects of the ARM based PSoC silicon devices from Cypress. Particularly the Full-Speed USB module and special purpose GPIO pins. From April 2011 to August 2011 (5 months) Parent of Students @ From 2007 to April 2011 (4 years) Principal Design Engineer @ MAC/SOC Digital Designer for UWB WiMedia standard. Continuation of work done at Avnera, but working against a standard and not limited to just audio. From March 2008 to September 2008 (7 months) Sr. Staff Engineer @ Responsible for the design, implentation and integration of an embedded computer system that is designed and architected from scratch using a combination of purchased IP, In-House IP and custom IP. The computer system is to be integrated into a single chip SOC that also incorporates RF and Analog circuits. *** CURRENT CAREER PINNACLE *** Started on a 2nd project about 7 months after starting work for Avnera, the 2nd project was a much higher priority project. From my personal involvement on the "2nd" project to time we got silicon in hand was just 4 months with 1st pass success on a wireless SOC design that contained digital, DSP, analog and RF design blocks on a single die; up and full running in less than a week after getting silicon in hand. From September 2006 to September 2007 (1 year 1 month) Electrical Engineer @ Worked on Microprocessor design. The company is also doing software and system-on-chip development to be used in a complete solution system for our customers. The end product WILL define a new product that is on the same scale as the personal computer (PC) that helped to define the 70's & 80's. A product that will help to define the 21st century in the same pioneering manner as the PC did in the past. From September 2005 to August 2006 (1 year) Sr. Design Engineer @ Worked on the microprocessor design team for ARM Core to added out-of-order execution. Particularly on the instruction execution block and the commit/retirement block. Also wrote ARM assembly code to help with debugging of the core's design. The job was in Cary/RTP, NC not San Diego. From March 2004 to February 2005 (1 year) Sr. Design/Test Engineer @ Worked on the hardware debugging logic for 16F877 and helped with debug of the 18F core. Worked on the initial design of the dsPIC core. Particulary the PC, Instruction Register, Instruction Sequencer, Instruction Decode, Looping Control and Status Register logic. Also worked to take the product to production by taking on test engineering roles using the Teradyne J750 tester. From August 1999 to December 2003 (4 years 5 months) Design/Sr. Applications Engineer @ Started off in the Government side of Harris Corp. (GASD) then moved to the Semiconductor side. The Harris Semiconductor group would separate off and become Intersil. Worked on the design of ASICs, PCB/PWBs, and FPGAs. In application role worked with customers to resolve issues with Video Encoders & Decoders, Hi-Speed A/D & D/A converters.It was while working at Harris Semi/Intersil that I initially got some hands-on exposure to DSP & RF design concepts. From January 1996 to July 1999 (3 years 7 months) VLSI Design Engineer @ This was a VLSI design job that I got thanks to my VLSI design class instructor (Wei Li) at NCSU. This summer job would carry on into being a part-time job in the fall until graduation. I worked on the design of standard cells for a clocked Low-Voltage Differential Signal (LVDS) library that provided logic that produced complimentary outputs while providing an area savings over simply using duplicate copies of the CMOS logic. This was a NSA funded project. I never got to meet any of the NSA folks...oh well. ;) From March 1995 to December 1995 (10 months) Programmer Analyst @ The lone "technician" in a medical device start-up, while I was still in high school, that initially developed a compressed air (a CO2 stand alone container) assisted syringe. This syringe was used to pump a very viscus compound into a patient's body so that blockages could show up on X-Rays. The company would then broaden its offerings and manufacture biopsy forceps and laproscopic instruments. In 1992 the company would have a rather successful exit and got acquired for $175M. My experiences ranged from developing mechanical prototypes using lost wax injection molds and doing some basic AutoCAD drawings, i.e. 2-D only, to eventually moving into machine validation, database development/migration/support and PC support. I would decide to use my proceeds from the successful exit to finish up my degree. It was certainly a nice journey with lots of learning about both business and engineering. This experience drove me to also minor in business. From October 1988 to December 1992 (4 years 3 months) Firmware Programmer @ This opportunity started off as a co-op experience while I was in high school, but initially I only got high school credit for the experience. That would change after I graduated from HS. Aside from working full-time over the summer after graduation, I worked part-time, via Fedex, during my first year of college. I was responsible for writing the motor control firmware for a medical device that was the equivalent of the roto-rooter for cleaning plaque buildup in veins and arteries which limited blood flow. My initial involvement with the company was when it was just Theratek...a novel medical device start-up. It would eventually get bought in the fall of 1990 by Dow-Corning Wright. It was a modest exit, but it certainly could have been worse. Still a great learning experience and yes, I did time-slice myself with working at Symbiosis...there was still the weekends right and I was rather young back then. The people at both companies made ALL the experiences an overall GREAT experience for me. From September 1988 to December 1990 (2 years 4 months) LSM Trainer & DB Admin @ From 1987 to 1988 (1 year) MSEE, Electrical Engineering @ Florida Institute of Technology From 1997 to 1999 BSEE, Electrical Engineering @ North Carolina State University From 1989 to 1995 Hialeah Miami Lakes From 1987 to 1989 Manuel Muro is skilled in: ASIC, SoC, FPGA, Verilog, Debugging, EDA, Embedded Systems, Semiconductors, VLSI, RTL design, Mixed Signal, Analog, Microprocessors, SystemVerilog, Embedded Software

Manuel Muro’s Personal Email Address, Business Email, and Phone Number

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Frequently Asked Questions about Manuel Muro

What company does Manuel Muro work for?

Manuel Muro works for VEFXi

What is Manuel Muro's role at VEFXi?

Manuel Muro is VP of Engineering

What is Manuel Muro's personal email address?

Manuel Muro's personal email address is m****[email protected]

What is Manuel Muro's business email address?

Manuel Muro's business email addresses are not available

What is Manuel Muro's Phone Number?

Manuel Muro's phone (503) ***-*307

What industry does Manuel Muro work in?

Manuel Muro works in the Semiconductors industry.

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In a nutshell

Manuel Muro's Personality Type

Extraversion (E), Intuition (N), Feeling (F), Judging (J)

Average Tenure

1 year(s), 10 month(s)

Manuel Muro's Willingness to Change Jobs



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