Thomas Ferreras
Electrical Engineer at Mathtech | Forked River, New Jersey, United States
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Thomas Ferreras is a highly accomplished Senior Design Engineer at JuST Engineer, where he leverages his extensive experience in product design, production, and support to drive innovative solutions across various sectors, including communications, security, and military applications. With a rich background working with industry giants such as Bell Labs, LG, and SRI, Thomas has honed his expertise in system architecture, focusing on mixed-signal hardware and firmware integration. His proficiency in designing embedded processors, microprocessors, and programmable gate arrays (PGA) has positioned him as a key contributor to the engineering group at JuST Engineer, where he oversees projects from initial concept through to production.
Currently, Thomas is spearheading several high-impact projects, including the development of a sophisticated M2M (Machine-to-Machine) architecture that emphasizes seamless communication and compliance with EMC FCC Class A standards. His work on HD video transmission systems, particularly the implementation of 5M video over Wi-Fi with robotic payloads, showcases his ability to integrate advanced technologies such as ARM Cortex processors into single-board designs. His technical skill set encompasses a wide array of protocols and standards, including VOIP, TCP, UDP, and SONET, alongside a strong command of programming languages such as VHDL, Verilog, C, and C++.
Thomas's commitment to excellence is evident in his meticulous approach to RTL verification and embedded systems design, ensuring that every project not only meets but exceeds industry standards. His collaborative spirit and innovative mindset make him an invaluable asset to JuST Engineer, where he continues to push the boundaries of technology and engineering.
Sr Engineer at JuST Engineer, WWW.justeng.com in June 2019 to Present
Electrical Engineer at Mathtech in November 2024 to Present
Sr Hardware Design Engineer at Nokomis, Inc. in July 2024 to October 2024
Sr Firmware Engineer at TapHere! Technology, LLC in November 2023 to January 2024
Design Engineer at GE Hitachi Nuclear Energy in September 2022 to June 2023
Senior Design Engineer at QRC Technologies, contactor for Black Diamond in April 2022 to August 2022
Sr Design Hardware Engineer at Milano Technical Group Inc in February 2022 to April 2022
Hardware Engineer at Murcury Systems in June 2021 to February 2022
Sr Design Engineer at Jacobs in January 2021 to April 2021
Sr Design Engineer at Comnet in September 2020 to October 2020
Sr Design Enginner at AES Corporation in May 2020 to September 2020
Sr Design Engineer at Teradyne in August 2019 to May 2020
SR Engineer at Jasmine Universe LLC in February 2016 to April 2019
Sr Design Engineer at Justeng in May 2014 to January 2016
Senior Design Engineer at Passport Systems in April 2015 to August 2015
SR Digital Designer at Magnolia Broadband in January 2013 to January 2014
Senior Hardware / FPGA Engineer Consultant at DesignLinx Hardware Solutions in July 2012 to April 2013
SR Electral Engineer at SRI International Sarnoff in December 2009 to July 2012
Senior Electronic Engineer at SRI International Sarnoff, Product & Services Division in December 2009 to June 2012
Senior Hardware Digital Designer in R&D at LG Electronic USA, IRIS Division in September 2008 to October 2009
Senior Design Engineer in R&D at LG Electronics USA, IRIS devision in September 2008 to September 2009
SR design eng at TruePosition in January 2007 to January 2008
Senior Member of Technical Staff at IPC, www.ipc.com, formally: ORBACOM in May 2003 to July 2007
Senior Hardware Design Engineer at ARTESYN, www.artesyncp.com, Formally: RTD (Real Time Digital) in June 2002 to May 2003
Member of Technical Staff at LUCENT Technologies, www.lucent.com, Formerly: AT&T Bell Labs in June 2000 to June 2002
Member of Technical Staff at Business Solutions (BCS) Now: AVAYA in July 1998 to May 2000
Member of Technical Staff at Consumer Products in March 1995 to June 1998
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Rutgers University, September 1979 to September 1981
Devry, September 1977 to September 1979
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Printed Circuit Board (PCB) Design
RTL Verification
Embedded Systems
FPGA
Digital Signal Processors
Ethernet
SoC
CDMA
Linux
Altera
Xilinx
DFT
Analog
VOIP, TCIP, UDP, SONET, CDMA, Project 25 (Public Safety), HSPI
VHDL, VERLOG, C, C++, Assembly
Quartus II, ISP Foundation, ModelSim, PSPICE, MathCAD
Windows, LINUX, Android. U-Boot
Ethernet 10/100/1G/10G, USB 2, PCI, PCIe, PTMC, Advanced TCA
BT.656, BT.1120, 8/16-bit CMOS, HDSDI, HDMI, NTSC
UART, USB Serial (UART), I2C, SD, SPI, CT bus (H.110), IPMB (IPMI)
TI, Freescale, INTEL, ATMEL, SAMSUM, ST and MARVEL
ALTERA family, Xilinx family and ACTEL family
PADS, OrCAD, P-CAD, CAM 750
DFM
FPGS
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Discover more about MathtechWhat is Thomas Ferreras email address?
Email Thomas Ferreras at [email protected] and [email protected]. This email is the most updated Thomas Ferreras's email found in 2026.
How to contact Thomas Ferreras?
To contact Thomas Ferreras send an email to [email protected] or [email protected]. (updated on September 06, 2024)
What company does Thomas Ferreras work for?
Thomas Ferreras works for Mathtech
What is Thomas Ferreras's role at Mathtech?
Thomas Ferreras is Electrical Engineer
What is Thomas Ferreras's Phone Number?
Thomas Ferreras's phone (201) ***-*337
What industry does Thomas Ferreras work in?
Thomas Ferreras works in the Mechanical Or Industrial Engineering industry.
Thomas Ferreras Email Addresses
Thomas Ferreras Phone Numbers
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