Tero Rissa
Machine Learning Silicon Architect at Google DeepMind | Mountain View, California, United States
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Tero Rissa serves as a Machine Learning Silicon Architect at Google DeepMind, where he plays a pivotal role in advancing the capabilities of AI through innovative silicon solutions. As the lead for the Gemini silicon project, Tero is at the forefront of developing cutting-edge hardware designed specifically for machine learning inference acceleration. His expertise in AI/ML productization enables him to bridge the gap between complex algorithms and practical applications, ensuring that advanced machine learning models can be efficiently deployed in real-world scenarios.
Tero's work encompasses a broad spectrum of responsibilities, including hardware and software concepting and productization, which are crucial for creating scalable and efficient systems. His proficiency in system architecture design allows him to develop robust frameworks that integrate seamlessly with digital image processing and compression technologies, enhancing the performance of AI-driven applications. Tero's commitment to advanced system prototyping ensures that innovative ideas are transformed into tangible products, pushing the boundaries of what's possible in machine learning.
In addition to his technical skills, Tero excels in cross-functional team building, fostering collaboration among diverse groups to drive product development forward. His background in computer vision and software development, combined with his knowledge of electronic design automation (EDA) and programming languages like C and Perl, positions him as a versatile leader in the tech industry. With a focus on intellectual property rights (IPR) creation, Tero is dedicated to not only advancing technology but also protecting the innovations that emerge from his work at Google DeepMind.
Machine Learning Silicon Architect at Google DeepMind in October 2024 to Present
TPU Lead Silicon Architect at Google in August 2022 to October 2024
Principal System Architecture & DSP Specialist (Xilinx acquisition) at AMD in February 2022 to August 2022
Principal System Architecture & DSP Specialist at Xilinx in January 2020 to February 2022
Principal Architect, Machine Learning at Nokia Bell Labs in April 2019 to January 2020
Chief Architect, Machine Learning at Nokia in December 2017 to March 2019
Distinguished Architect at Nokia in September 2014 to November 2017
Director, Forward Labs R&D at Microsoft in November 2013 to September 2014
Head of Application Development at Nokia in August 2012 to October 2013
Senior Manager at Nokia in September 2007 to July 2012
Member of CEO Technology Council at Nokia in January 2009 to April 2011
Technology Coordinator at Nokia in November 2006 to August 2007
PhD (Computing) at Imperial College London in March 2003 to September 2006
Research Intern at Xilinx Inc in May 2004 to August 2004
Senior Research Engineer at Nokia in September 2002 to March 2003
Researcher at Tampere University of Technology in January 1998 to October 2002
Visiting Researcher at Bournemouth University in September 2000 to August 2001
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Imperial College London, PhD, September 2026
Tampere University of Technology, MSc, September 1997 to September 2026
Hanken & SSE
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Strategic Planning
Strategic Thinking
High Performance Teams
Cross-Functional Team Building
Software Project Management
Prototyping
Concept Development
Productization
Rapid Prototyping
Computer Vision
Low-power Design
Low Power Systems
High Speed Interfaces
Digital Image Processing
Video Compression
Organizational Leadership
Project Management
Cross-functional Team Leadership
Applied Machine Learning
Machine Learning
Digital Logic
Embedded Systems
Hardware
Software Development
VHDL
Computer Architecture
FPGA
Process Development
R&D
Wireless
System Architecture
Product Management
Research
Program Management
Telecommunications
ASIC
Product Development
Electronics
Assembly
Algorithm Design
Hardware Design
Team Leadership
RTL design
EDA
C++
C
Software Engineering
Hardware Architecture
Mobile Devices
SoC
Architecture
Embedded Software
Mobile Communications
ARM
Strategy
Mobile Technology
Mobile Applications
Digital Signal Processors
Technical Leadership
System Design
Software Design
Embedded Linux
Perl
Systems Design
Field-Programmable Gate Arrays (FPGA)
Wireless Technologies
Research and Development (R&D)
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Discover more about Google DeepMindWhat is Tero Rissa email address?
Email Tero Rissa at [email protected] and [email protected]. This email is the most updated Tero Rissa's email found in 2026.
How to contact Tero Rissa?
To contact Tero Rissa send an email to [email protected] or [email protected]. (updated on August 25, 2024)
What company does Tero Rissa work for?
Tero Rissa works for Google DeepMind
What is Tero Rissa's role at Google DeepMind?
Tero Rissa is Machine Learning Silicon Architect
What is Tero Rissa's Phone Number?
Tero Rissa's phone (213) ***-*111
What industry does Tero Rissa work in?
Tero Rissa works in the Semiconductors industry.
Tero Rissa Email Addresses
Tero Rissa Phone Numbers
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