VP of Product Development/System Architect @ • Stealth mode wireless startup From January 2015 to Present (1 year) San Francisco Bay AreaWireless Product Architect @ • Architect and design consumer products for new wireless product line From May 2013 to December 2014 (1 year 8 months) Sydney Area, AustraliaChief Technical Officer/Founder @ • Consortium bringing together ideas and opportunities in the digital wireless audio space From April 2011 to May 2013 (2 years 2 months) Senior FPGA Architect @ • ULL-3000 project
• Specification and design of low latency networking protocols
• EBAND RF baseband algorithms and synchronization strategies
• Distributed control plane infrastructure and dataflow
• FPGA design RTL/Verification in Verilog targeting Spartan-6 using using multiple channels of gigabit data
• Project lead/architect of FPGA design team From February 2009 to April 2013 (4 years 3 months) Chief Technical Officer/Founding partner @ • Chief Technical Officer at Brace Audio combining technical strategy with market opportunity, product features and development of key vendor and technical partnerships
• Concept, product definition and design of the award winning DWG1000 wireless guitar product
• Management of manufacturing and operations using concurrent engineering processes to build a high quality low cost product using manufacturing in the USA
• Interface and maintain relationships with investment partners
• Executive management functions with regard to engineering, manufacturing and operations.
• Research and development of low latency wireless protocols targeting the music industry From February 2006 to April 2011 (5 years 3 months) Member of Technical Staff @ • Optical switch project
• Responsible for all CPLD/FPGA control plane development across all module line cards in the system
• Designs included basic control plane glue logic, ADC acquisition and control loops, DDS and DSP functions for clock recovery and jitter reduction for 10G/0C-192/OC-48/GE interfaces
• FPGA/CPLD design using Verilog targeting Xilinx and Altera chipsets including Spartan and Cyclone series. From April 2003 to February 2006 (2 years 11 months) Senior Board Design Engineer @ • Next generation router project
• Specify, as team member, overall system design including backplane signal sets, chassis, power supply, backplanes, etc.
• Specify architecture for all media card designs
• Design PCB with Viewdraw/PERL scripts and Allegro
• Signal Integrity via constraints in Allegro netlist
• Full functional simulation of boards in Verilog
• FPGA/CPLD design using Verilog targeting Xilinx Spartan series. From January 2001 to April 2003 (2 years 4 months) Senior Board Design Engineer @ • Stinger DSLAM project
• Hardware project lead for special function and network interface cards in the Stinger DSLAM
• Projects included DS3 HDLC termination card, T1 aggregation and OC3 trunk interface card.
• Design PCB with Viewdraw and Allegro
• FPGA/CPLD design using Verilog targeting Xilinx/Altera chipsets. From July 1999 to January 2001 (1 year 7 months) Senior Hardware Design Engineer @ • Ascend advanced products group
• Work directly with CTO to define and develop next generation products integrating new technology with existing products borrowed from various corporate divisions.
• See product through concept, architecture, design and prototyping. From July 1998 to July 1999 (1 year 1 month) Hardware Design Engineer @ • Develop digital video set top box architectures to meet customer requirements, while creating low cost, varied featured products suited for mass production.
• See product through initial concept to high volume production
• Design PCB with Viewdraw and Allegro.
• CPLD design using Verilog/AHDL targeting Xilinx/Altera chipsets
• ASIC RTL design using Verilog
• Tasks included ongoing support of manufacturing partner relationships.
• Low level boot/driver development using C and assembly From February 1995 to July 1998 (3 years 6 months) Research Fellow @ • Masters degree thesis in optics
• Research, simulation, building and testing of subcarrier multiplexed WDM system From June 1994 to February 1995 (9 months)
Scott Young is skilled in: Digital Signal Processors, Semiconductors, Hardware Architecture, FPGA, Embedded Systems, Fiber Optics, Ethernet, Product Marketing, PCB design, Signal Integrity, ASIC, Digital Signal Processing, Device Drivers, IC, Embedded Software
Websites:
http://www.terabitradios.com