Pratik Shah’s Email & Phone

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Pratik Shah

Lead Validation Engineer @ Cavium Inc

Pratik Shah Contact Details

San Francisco Bay Area
Lead Validation Engineer @ Cavium Inc
Design Verification Engineer @ Synapse Design Automation Inc.
Pre-Silicon Verification Engineer @ Intel Corporation

9 years of experience in ASIC and FPGA verification (1) Networking Switch ASIC verification at block level using SV-UVM (2) SSD Controller ASIC verification at block level using SV-UVM (3) HPC ASIC verification at block and cluster level and chip level using SV - OVM/UVM (4) PCI Express Gen-2 Test Suite Developement for devices like Root Complex 

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