Yasith Mir Email & Phone Number

Yasith Mir

Lead Engineer at HCLTech | Hyderabad, Telangana, India

Yasith Mir Socials
About Yasith Mir

Yasith Mir is a highly skilled Lead Engineer at HCLTech, specializing in Digital Design within the ASIC/FPGA domain. With a robust background in RTL synthesis using Verilog and VHDL, Yasith has established himself as a key player in the development of cutting-edge digital solutions. His expertise extends to CMOS IC Design and Layout, where he applies his analytical skills to navigate complex design flows and perform static timing analysis.

Currently, Yasith is engaged in a pivotal project with Intel Corp, where he serves as a Product Development and Logic Design Engineering Contractor. In this role, he has successfully created a comprehensive graphical user interface (GUI) for a contemporary Ethernet-based FPGA intellectual property (IP) using his proficiency in HDL and Tcl. This project not only showcases his technical acumen but also highlights his ability to manage the complete FPGA design flow, from initial concept to final implementation.

Yasith’s skill set is further enhanced by his familiarity with industry-standard tools such as Quartus, Xilinx ISE, and Cadence Spectre, allowing him to efficiently tackle challenges in Very-Large-Scale Integration (VLSI) design. His holistic approach to problem-solving and patient demeanor make him a valuable asset to any team, as he consistently delivers high-quality results while fostering collaboration and innovation. As he continues to push the boundaries of digital design, Yasith remains committed to leveraging his expertise to drive advancements in technology and contribute to the success of HCLTech and its clients.

Yasith Mir Work
1 experience icon

Lead Engineer at HCLTech in May 2021 to Present

2 experience icon

Test Engineer at HCLTech in May 2019 to April 2021

3 experience icon

Programming Analyst at Ramco Systems in July 2014 to September 2015

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Yasith Mir Education

University of Florida, Master of Science (M.S.), July 2026

Birla Institute of Technology and Science, Pilani, Bachelor of Engineering - BE, July 2026

Yasith Mir Skills

TCL

Field-Programmable Gate Arrays (FPGA)

SystemVerilog

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About Yasith Mir's Current Company
Frequently Asked Questions about Yasith Mir

What is Yasith Mir email address?

Email Yasith Mir at [email protected] and [email protected]. This email is the most updated Yasith Mir's email found in 2026.

What is Yasith Mir phone number?

Yasith Mir phone number is 9652234850.

How to contact Yasith Mir?

To contact Yasith Mir send an email to [email protected] or [email protected]. If you want to call Yasith Mir try calling on 9652234850. (updated on November 10, 2024)

What company does Yasith Mir work for?

Yasith Mir works for HCLTech

What is Yasith Mir's role at HCLTech?

Yasith Mir is Lead Engineer

What industry does Yasith Mir work in?

Yasith Mir works in the Information Technology & Services industry.

Yasith Mir Email Addresses

Email Yasith Mir at [email protected] and [email protected]. This email is the most updated Yasith Mir's email found in 2026.

Yasith Mir Phone Numbers

Yasith Mir phone number is 9652234850.
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