Shurhavetsky Stas, HW validation post si team lead at Altera

Shurhavetsky Stas

HW validation post si team lead at Altera | Israel

Profile last verified May 2026
Semiconductors Verified Profile Israel The Hebrew University of Jerusalem
Verified

Work Email

***@intel.com

Last verified May 2026

Phone Number

(**) *** *** 408

Israel • Phone

Free account · No credit card · 5 profiles/month

Shurhavetsky Stas Socials
Shurhavetsky Stas Work Experience

Post Silicon Electrical Validation Engineer at Intel in March 2006 - Present

Post Si Validation Team Lead at Intel Corporation in April 2016 - Present

HW validation post si team lead at Altera in January 2025 - Present

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Final testing at RAD in December 2002 - March 2006

Shurhavetsky Stas Education

The Hebrew University of Jerusalem, Master of Business Administration - MBA, June 2026

Jerusalem College of Engineering, Bachelor of Science - BS, June 2026

Technion - Israel Institute of Technology, Practical eng, June 1999 to June 2026

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Chelyabinsk, Russia, Technical, June 1991 to June 1993

Shurhavetsky Stas Skills
Debugging Verilog ASIC PCIe SoC Testing System Testing Labview TCL Embedded Systems VLSI FPGA Device Drivers Python Test Automation Semiconductors Intel C# Hardware Architecture Object Oriented Design System on a Chip (SoC)
About Shurhavetsky Stas’s Current Company
Altera

Altera: Accelerating Innovators Altera provides leadership programmable solutions that are easy-to-use and deploy in applications from cloud to edge, offering limitless AI possibilities. Our end-to-end broad portfolio of products including FPGAs, CPLDs, Intellectual Property, development tools, System on Modules, SmartNICs and IPUs provide the flexibility to accelerate innovation. Altera is helping to shape the future through pioneering innovation that unlocks extraordinary possibilities for everyone on the planet.

Discover more about Altera
Shurhavetsky Stas’s Colleagues
Shmuel Anijar

Shmuel Anijar

Jerusalem District, Israel

Post Silicon Engineer @ Altera | Electrical Engineering

Post silicon engineer at Altera
(January 2025 – Present)

Sai Danda

Sai Danda

San Francisco Bay Area

CIO | Digital Transformation

Chief Information Officer at Altera
(June 2025 – Present)

Igor Sayfullaev

Igor Sayfullaev

Ramat Gan, Tel Aviv District, Israel

Analog Circuit Design Engineer | Signal Integrity

Analog Circuit Design Engineer at Altera
(December 2025 – Present)

Chakor Pandkar

Chakor Pandkar

Los Angeles, California, United States

Software Engineer at Intel San Jose 2022 | MSCS USC 2022 Graduate

Software Developer at Altera
(September 2025 – Present)

ID

Itay Dery

Ramat Gan, Tel Aviv District, Israel

Analog Design Engineer

Analog Design Engineer at Altera
(December 2024 – Present)

NN

Norrirdzuwan N

Bayan Lepas, Penang, Malaysia

Software Development Lead ⨯ FPGA Development Tools Engineer

Software Development Lead at Altera
(October 2024 – Present)

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Frequently asked questions about Shurhavetsky Stas

What is Shurhavetsky Stas email address?

Email Shurhavetsky Stas at [email protected] and [email protected]. This email is the most updated Shurhavetsky Stas's email found in 2026.

How to contact Shurhavetsky Stas?

To contact Shurhavetsky Stas send an email to [email protected] or [email protected]. (updated on December 27, 2025)

What company does Shurhavetsky Stas work for?

Shurhavetsky Stas works for Altera.

What is Shurhavetsky Stas's role at Altera?

Shurhavetsky Stas is HW validation post si team lead

What industry does Shurhavetsky Stas work in?

Shurhavetsky Stas works in the Semiconductors industry.

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