Nihal Shastry
Senior Design Verification Engineer at NXP Semiconductors | Gilbert, Arizona, United States
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Nihal Shastry is a seasoned Senior Design Verification Engineer at NXP Semiconductors, where he leverages his extensive expertise in analog mixed-signal (AMS) and digital mixed-signal (DMS) design verification. With a strong foundation in semiconductor devices and electrostatic discharge (ESD) cell design, Nihal plays a pivotal role in the pre-silicon verification of complex mixed-signal integrated circuits (ICs). His proficiency in Process Design Kit (PDK) development enhances his ability to conduct thorough design rule checking (DRC), parasitic extraction, and wafer pattern generation, ensuring that designs meet stringent industry standards.
In his current role, Nihal has been instrumental in verifying and flagging critical issues related to the low-dropout (LDO) trimming algorithm utilized by firmware and automated test equipment (ATE). This work is essential for accurately trimming the output of over six on-chip LDOs, directly impacting the performance and reliability of NXP's products. Additionally, he has driven the verification of current steering digital-to-analog converters (DACs) used in RF baseband applications, contributing to the development of advanced on-chip direct digital synthesis (DDS) blocks.
Nihal's technical prowess extends to creating sophisticated SystemVerilog (SV) testbenches for ultra-wideband (UWB) chips, employing custom nets to enhance simulation accuracy and efficiency. His skill set includes a deep understanding of physical verification processes, such as layout versus schematic (LVS) checks, and the use of EDA tools like Spectre for circuit simulation. With a background in BiCMOS technology and proficiency in scripting languages like Perl, Nihal is well-equipped to tackle the challenges of modern semiconductor design verification, driving innovation and quality at NXP Semiconductors.
Senior Design Verification Engineer at NXP Semiconductors in July 2022 to Present
Mixed Signal Design Verification Engineer at Texas Instruments in August 2018 to August 2022
Mixed Signal Design Verification Lead at Texas Instruments in September 2020 to June 2021
ESD Development engineer at Texas Instruments in September 2016 to July 2018
PDK Physical Verification Engineer at Texas Instruments in April 2010 to September 2016
PDK Engineer at Silvaco Inc in October 2006 to April 2010
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University at Buffalo School of Engineering and Applied Sciences, MS, November 2026
University of Madras, B.E, November 2026
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SystemVerilog
Radio Frequency (RF)
Functional Verification
Verilog
Physical Verification
DRC
LVS
Spectre
Cadence
EDA
BiCMOS
PDK Development
CMOS
Perl
Semiconductors
SPICE
Virtuoso
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Discover more about NXP SemiconductorsWhat is Nihal Shastry email address?
Email Nihal Shastry at [email protected] and [email protected]. This email is the most updated Nihal Shastry's email found in 2026.
What is Nihal Shastry phone number?
Nihal Shastry phone number is 7162080577.
How to contact Nihal Shastry?
To contact Nihal Shastry send an email to [email protected] or [email protected]. If you want to call Nihal Shastry try calling on 7162080577. (updated on January 03, 2025)
What company does Nihal Shastry work for?
Nihal Shastry works for NXP Semiconductors
What is Nihal Shastry's role at NXP Semiconductors?
Nihal Shastry is Senior Design Verification Engineer
What industry does Nihal Shastry work in?
Nihal Shastry works in the Semiconductors industry.
Nihal Shastry Email Addresses
Nihal Shastry Phone Numbers
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