Jags Jay
Principal Engineer at NVIDIA | Austin, Texas, United States
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Jags Jay serves as a Principal Engineer at NVIDIA, where he leverages over 20 years of extensive experience in ASIC design and next-generation 3DIC solutions development, particularly through the application of AI and machine learning techniques. In his current role, Jags is at the forefront of 3D-IC flows and methodology development, focusing on creating innovative solutions that enhance the performance and efficiency of integrated circuits. His deep expertise encompasses the entire spectrum of 3DIC implementation, from initial topology explorations to the meticulous definition of signoff flows, ensuring that each project meets the highest standards of quality and performance.
Jags has been instrumental in several key projects that push the boundaries of semiconductor technology, particularly in the realm of physical design and PPA (Power, Performance, Area) improvements. His proficiency in full-chip to block-level RTL-to-GDS full-flow implementation has made him a pivotal figure in driving advancements in EDA (Electronic Design Automation) tools and methodologies. He is well-versed in physical verification processes, including LVS (Layout Versus Schematic) and EM RV (Electromigration Reliability Verification), utilizing tools like Cadence Encounter to ensure robust designs.
His passion for systems design and his commitment to integrating cutting-edge technologies into ASIC development have positioned him as a thought leader in the industry. Jags’s ability to navigate complex challenges in VLSI design while fostering collaboration across multidisciplinary teams underscores his role as a key contributor to NVIDIA's mission of delivering groundbreaking solutions in the semiconductor space. His insights and leadership continue to shape the future of 3DIC technology, making him a valuable asset to both his team and the broader engineering community.
Principal Engineer at NVIDIA in November 2024 to Present
Engineering Director @ Strategic Solutions group at Cadence Design Systems in June 2005 to December 2024
Physical designer at Intel India in February 2003 to June 2005
Senior Engineer at Siemens in August 2001 to February 2003
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Coventry University, Msc Engg., September 2026
Harvard University, Management degree, September 2026
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3DIC
3D-IC
Systems Design
Floorplanning
Physical Design
EM RV
EDA
CAD
Physical Verification
Mixed signal flow development
Cadence Virtuoso
Cadence encounter
ASIC
SoC
Mixed Signal
Semiconductors
Verilog
Application-Specific Integrated Circuits (ASIC)
CMOS
DRC
LVS
VLSI
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Discover more about NVIDIAWhat is Jags Jay email address?
Email Jags Jay at [email protected] and [email protected]. This email is the most updated Jags Jay's email found in 2026.
What is Jags Jay phone number?
Jags Jay phone number is +16035570698.
How to contact Jags Jay?
To contact Jags Jay send an email to [email protected] or [email protected]. If you want to call Jags Jay try calling on +16035570698. (updated on August 25, 2024)
What company does Jags Jay work for?
Jags Jay works for NVIDIA
What is Jags Jay's role at NVIDIA?
Jags Jay is Principal Engineer
What industry does Jags Jay work in?
Jags Jay works in the Semiconductors industry.
Jags Jay Email Addresses
Jags Jay Phone Numbers
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