Bert Verrycken

Director Verification at Innatera in March 2023 to November 2023

Principal Engineer, verification team manager at Axelera AI in January 2022 to January 2023

Technical Writer on self-employed company on Linkedin with 19K+ followers at VLSI design experts for ASIC and FPGA in February 2014 to December 2022

ASIC mixed-signal design and verification at Mythic in August 2020 to January 2022

Technical Writer with 60K+ Quora Space at VLSI design experts for ASIC and FPGA in October 2017 to December 2021

ASIC mixed-signal design and verification at Analog Devices in April 2019 to December 2019

ASIC digital design and verification at Intel Movidius in February 2018 to September 2018

ASIC design and verification Myriad for Neural Compute Stick at Intel Movidius in November 2016 to January 2017

ASIC system on chip, network on chip and memory generation for Myriad X at Intel Movidius in January 2016 to October 2016

USB bare metal host and device, Myriad 2, Intel Movidius Neural Compute Stick at Intel Movidius in April 2015 to December 2015

FPGA freelance consultant at Newtec in January 2012 to January 2014

ASIC consultant at STMicroelectronics in January 2011 to January 2011

Werknemer at Semiconductor Companies in August 1998 to October 2010

VLSI engineer at NXP Semiconductors in January 2002 to January 2004