Adarsh Panikkar
Engineer IV at QUALCOMM CDMA Technologies | Greater Seattle Area
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Adarsh Panikkar currently serves as Engineer IV at QUALCOMM CDMA Technologies, where he plays a pivotal role in the architecture and design of RF digital subsystems. With extensive expertise in the full life-cycle silicon development of cutting-edge processors and chipset high-speed interconnect ASICs, Adarsh is instrumental in driving innovation in System-on-Chip (SoC) integration. His proficiency in computer architecture and ASIC design flow allows him to navigate complex design challenges, ensuring optimal performance and efficiency in modern semiconductor solutions.
In his current role, Adarsh is deeply involved in key projects that leverage his skills in logic design, RTL design, and functional verification. He utilizes advanced tools and methodologies, such as Cadence Virtuoso for analog mixed-signal verification and synthesis, to achieve timing closure and ensure robust design for testing and debugging. His expertise in low-power design techniques is particularly crucial in today’s market, where energy efficiency is paramount.
Adarsh's hands-on experience with high-speed interconnects, including PCIe, positions him as a valuable asset in developing next-generation communication technologies. He is adept at using oscilloscopes and other testing equipment to validate circuit designs, ensuring that they meet stringent performance criteria. His commitment to excellence in post-silicon validation further underscores his dedication to delivering high-quality products that meet the demands of an ever-evolving industry. Through his work, Adarsh continues to contribute to QUALCOMM's mission of advancing wireless technology, making significant strides in the realm of semiconductor design and integration.
Engineer IV at QUALCOMM CDMA Technologies in January 2017 to Present
SoC Design Engineer at Facebook in August 2020 to Present
Senior Staff Electrical Engineer at MicroVision Inc. in August 2017 to March 2020
Senior Design Engineer at Intel Corporation in August 2011 to August 2016
Component Design Engineer at Intel Corporation in June 2001 to March 2011
Design Engineer | Personal Communications Sector at Motorola in August 1999 to August 2001
Graduate Teaching/Research Assistant at The University of Texas at El Paso in January 1997 to January 1999
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The University of Texas at El Paso, MS Electrical Engineering, September 1997 to September 1999
Manonmaniam Sundaranar University, Bachelor of Engineering (BEng)
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Logic Design
Low-power Design
Verilog
SoC
VLSI
RTL design
ASIC
Computer Architecture
FPGA
Logic Synthesis
PCIe
SystemVerilog
Functional Verification
Static Timing Analysis
Timing Closure
Semiconductors
Application-Specific Integrated Circuits (ASIC)
Modelsim
Debugging
board/tester
Oscilloscope
Integrated Circuit Design
Circuit Design
C
CMOS
Mixed Signal
Cadence Virtuoso
Field-Programmable Gate Arrays (FPGA)
Very-Large-Scale Integration (VLSI)
RTL Design
System on a Chip (SoC)
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Discover more about QUALCOMM CDMA TechnologiesWhat is Adarsh Panikkar email address?
Email Adarsh Panikkar at [email protected] and [email protected]. This email is the most updated Adarsh Panikkar's email found in 2026.
What is Adarsh Panikkar phone number?
Adarsh Panikkar phone number is 2533075012.
How to contact Adarsh Panikkar?
To contact Adarsh Panikkar send an email to [email protected] or [email protected]. If you want to call Adarsh Panikkar try calling on 2533075012. (updated on August 24, 2024)
What company does Adarsh Panikkar work for?
Adarsh Panikkar works for QUALCOMM CDMA Technologies
What is Adarsh Panikkar's role at QUALCOMM CDMA Technologies?
Adarsh Panikkar is Engineer IV
What industry does Adarsh Panikkar work in?
Adarsh Panikkar works in the Semiconductors industry.
Adarsh Panikkar Email Addresses
Adarsh Panikkar Phone Numbers
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