Achille Donida

Achille Donida currently serves as an RF Analog IC Designer at SAPHYRION SAGL, where he leverages his extensive expertise in analog and mixed-signal IC design to develop cutting-edge RF front-end solutions. His role involves designing high-performance RF circuits that meet the stringent requirements of modern wireless communication systems, including 5G and IoT applications. Achille’s deep understanding of RF analog circuitry, combined with his proficiency in advanced simulation tools, enables him to optimize circuit performance, minimize noise, and ensure robust signal integrity across a wide frequency spectrum.

At SAPHYRION SAGL, Achille has led key projects focused on the development of integrated RF transceivers, including the design of low-noise amplifiers (LNAs), mixers, and power amplifiers. His expertise in data converter design, particularly SAR ADCs and Sigma-Delta ADCs, has been instrumental in enhancing the analog-to-digital conversion processes within these RF systems. Achille’s proficiency in digital synthesis, Place & Route procedures, and mixed-signal modeling allows him to seamlessly integrate analog and digital components, ensuring efficient chip layout and manufacturability.

His skill set extends to audio amplifier design, notably ClassD audio amplifiers, where he applies his knowledge of signal processing and analog circuit design to achieve high efficiency and fidelity. Achille’s experience with simulation tools like Matlab, LaTeX, and industry-standard IC design environments supports his innovative approach to solving complex electronic challenges. Through his work at SAPHYRION SAGL, Achille continues to push the boundaries of RF IC design, contributing to the development of next-generation wireless communication devices with a focus on performance, power efficiency, and integration.