Responsible for the Architecture and Design of various 3D Computer Graphics Processor Units (GPUs) and DSPs for 3D Graphics and Video/Image Processing (HEVC (H.265), H.264, VC-1, MPEG, VP8), Camera ISP, Colorimetry and HDR for Video Display Specialties: Expertise in 3D Graphics, Video and Image Processing. Architecture and Design of high performance programable RISC/DSP cores for Video (H264, VC-1, MPEG), 3D graphics and high performance computing.

Principal Hardware Architect @ Encoder Architecture (H.264/AVC and H.265/HEVC), Rate-Distortion optimization, Low-latency encoding. Camera ISP Colorimetry (BT. Rec-2020, SMPTE ST.2084) - specification, architecture and test/verification From September 2011 to Present (4 years 4 months) Distinguished Engineer @ Requirements and Hardware Architecture Specification and design in the areas including Video Encoders (AVC, HEVC), Camera ISP, Display processor (Wide Color Gamut, HDR). From October 2010 to September 2011 (1 year) Video Chief Architect @ From June 2003 to November 2010 (7 years 6 months) Chief Architect @ From May 2002 to November 2002 (7 months) Chief Architect and Manager @ Patents: US 7,779,231 - Pipelined processing using option bits encoded in an instruction From November 1999 to April 2002 (2 years 6 months) Chief Architect @ From September 1996 to January 1999 (2 years 5 months) Senior Engineer @ DSP Architecture From 1999 to 1999 (less than a year) Senior Research Engineer @ Responsible for R&D in Video Coding Standards (H263 + MPEG4). R&D in Video coding algorithms. From 1995 to 1996 (1 year) Senior Consultant @ Parallel Computer Architecture Development Responsible for System Architecture Development for Volume Visualization and Polygonal Rendering on ASP From 1993 to 1995 (2 years) Research Associate @ ESPRIT VIEWS Project - Computer and Machine Vision Research R & D in Neural Network and Fuzzy Logic in Machine Learning and Computer Vision From 1989 to 1993 (4 years) Research Fellow @ Research in Image Processing and Machine Vision Algorithms and System. From 1987 to 1989 (2 years)

PhD, Image Processing @ UCL From 1983 to 1987 Bsc (Hons), Pure Physics @ UCL From 1980 to 1983 Zahid PhD is skilled in: MPEG, VC-1, 3D, DSP, Algorithms, Image Processing, H.264, High Performance Computing, Hardware Design, C, Digital Signal Processors, Hardware Architecture, 3D graphics, IC, Processors