Sven Meier
Founder / CEO / FPGA Designer at NetTimeLogic GmbH | Zurich, Switzerland
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Sven Meier is a distinguished FPGA designer and the visionary founder and CEO of NetTimeLogic GmbH, where he leverages his extensive expertise in network redundancy and time synchronization to drive innovative solutions in the embedded systems landscape. With a career dedicated to the intricate world of Field Programmable Gate Arrays (FPGAs), Sven has successfully implemented a myriad of protocols that enhance network reliability and precision timing across various applications. His hands-on experience spans the entire development lifecycle, from initial architecture and design to implementation, driver development, and the creation of intuitive software GUIs, culminating in rigorous automated testing to ensure optimal performance.
At NetTimeLogic, Sven is currently spearheading key projects that focus on advancing time synchronization technologies, particularly through the development of the PPS Analyzer shield, which serves as a critical tool for analyzing pulse-per-second signals in complex network environments. His deep understanding of embedded systems and software engineering allows him to craft solutions that not only meet but exceed industry standards. Sven's proficiency in C programming and embedded software development further enhances his ability to create robust, efficient systems that are essential in today's fast-paced technological landscape.
As a thought leader in the field, Sven is committed to pushing the boundaries of what is possible with FPGA technology, continually exploring new methodologies and innovations that can improve network performance and reliability. His passion for engineering and dedication to excellence make him a key player in the evolution of time synchronization and network redundancy solutions, positioning NetTimeLogic GmbH as a frontrunner in the industry.
Founder / CEO / FPGA Designer at NetTimeLogic GmbH in March 2015 to Present
FPGA Development Engineer / Product Manager / Project Leader at Enclustra GmbH in January 2013 to August 2016
Development Engineer / Project Leader at Noser Engineering AG in July 2009 to December 2012
Development Engineer / Wissenschaftlicher Mitarbeiter at ZHAW School of Engineering in December 2004 to June 2009
Engineering Consultant at Teletronics Technology Corporation in July 2005 to December 2005
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AIONYX
PPS Analyzer shield
Time Synchronization
Network Redundancy
Time Sensitive Networking
Product Management
C++
Softwareentwicklung
Field Programmable Gate Arrays
Embedded Systems
Software Engineering
Software Development
C
Eingebettete Systeme
Electrical Engineering
Engineering
FPGA
Embedded Software
Automation
Electronics
Automatisierung
Eingebettete Software
Linux
Produktmanagement
Projektmanagement
Project Management
Elektrotechnik
Programmierung
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Discover more about NetTimeLogic GmbHWhat is Sven Meier email address?
Email Sven Meier at [email protected]. This email is the most updated Sven Meier email found in 2026.
How to contact Sven Meier?
To contact Sven Meier send an email to [email protected]. (updated on November 04, 2024)
What company does Sven Meier work for?
Sven Meier works for NetTimeLogic GmbH
What is Sven Meier's role at NetTimeLogic GmbH?
Sven Meier is Founder / CEO / FPGA Designer
What is Sven Meier's Phone Number?
Sven Meier's phone (**) *** *** 170
Sven Meier Email Addresses
Sven Meier Phone Numbers
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