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Michael PMP

ASIC Design Manager @ Vitesse Semiconductor

Michael PMP Contact Details

Austin, Texas Area
ASIC Design Manager @ Vitesse Semiconductor
Senior Applications Engineer @ Magma Design Automation
VLSI Design Courses @ The University of Texas at Dallas

Experienced in Physical Design, Mixed-Signal, Circuit design, simulation, and technical project management. Physical design background includes all phases of ASIC / SOC design - synthesis, timing closure, and place and route using tool suites from Synopsys, Cadence, and Magma. Specialties: * Physical Design, ASIC Design, Circuit Design, Mixed-Signal Design * Development Flows using Magma, Cadence, and Synopsys 

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