FPGA Engineer @ From December 2012 to Present (3 years 1 month) Sr. ASIC Design Engineer @ From December 2010 to December 2012 (2 years 1 month) Hardware Engineer @ From December 2006 to December 2010 (4 years 1 month) Characterization Engineer Intern @ From 2006 to 2006 (less than a year)
Ph.D/MS @ University of Southern
FPGA Engineer @ From December 2012 to Present (3 years 1 month) Sr. ASIC Design Engineer @ From December 2010 to December 2012 (2 years 1 month) Hardware Engineer @ From December 2006 to December 2010 (4 years 1 month) Characterization Engineer Intern @ From 2006 to 2006 (less than a year)
Ph.D/MS @ University of Southern California From 2001 to 2006 BS @ Shandong Universityshandong experimental high school Manjiang Zhang is skilled in: SystemVerilog, ASIC, TCL, Verilog, RTL design, SoC, Debugging, Hardware Architecture, FPGA, VLSI, Logic Design, PCIe, Functional Verification, IC, Static Timing Analysis
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