Software Engineer @ From April 2015 to Present (9 months) Software Engineer @ Development of High Frequency Trading systems. Ultra­ low latency ( From January 2012 to March 2015 (3 years 3 months) Senior Design Engineer @ Performance modelling and analysis of heterogeneous CPU-GPU "Fusion" processors. Developed cycle accurate models of CPU, GPU, interconnect, caches, memory and peripherals in C++. Designed and ran experiments to analyze design space trade offs in the micro- and macroarchitectures for meeting performance and power goals. Performed equivalent experiments on silicon. From June 2010 to January 2012 (1 year 8 months) Software Engineer @ Developed C++ code to drive dynamic 3D holographic display. Wrote hardware abstraction layer and driver-level software to interface with FPGA devices via PCIE, I2C and GPIO. Developed OpenGL demo applications for driving holographic content. Architected and implemented system latency metrics. Created reliable UDP broadcasting protocol for high-performance networking. From April 2009 to June 2010 (1 year 3 months) Field Organizer for West Delray Beach, Florida @ Directed campaign activities for West Delray Beach, Florida. Community organizing: registered voters, recruited, trained and organized teams of volunteers to administer phone banking, door-to-door canvassing and data entry operations. Prepared canvassing materials using VoteBuilder. Engaged public through informational talks at community centers and high schools. From September 2008 to November 2008 (3 months) GPU Hardware Architect @ Architectural design, evaluation and verification of industry-leading graphics processing units. Coded performance model of L2 cache for Fermi architecture in C++ using Boost and STL libraries. Coded functional model of MPEG/H.264 processor used in g8x/9x GPU variants. Coded test harness and simulation environments using Perl and Python. From January 2004 to September 2008 (4 years 9 months) Software Engineering Intern @ Designed and implemented telecommunications network management software in Java using industry standard protocols CMISE/CMIP/ASN.1 From May 2000 to August 2000 (4 months)

MS, Computer Science @ University of Illinois at Urbana-Champaign From 2002 to 2004 BS, Computer Science, Highest Honors @ Georgia Institute of Technology From 1996 to 2001 JP Taravella James Roberts is skilled in: C++, Processors, OpenGL, High Performance Computing, I2C, Debugging, Verilog, Perl, C, Hardware Architecture, Java, Python, Programming, Embedded Systems, OOP