Bp Ceng
Senior Director at eASIC | Milpitas, California, United States
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As the Senior Director at eASIC, Bp Ceng leverages his extensive expertise in semiconductor design and process optimization to drive innovative solutions that meet the evolving demands of the industry. With a proven track record of saving over $24 million through the strategic porting of high-volume products to alternative foundries, Bp Ceng exemplifies a results-oriented approach that prioritizes efficiency and cost-effectiveness. His adept management of hardware teams across the US and Penang, Malaysia, showcases his ability to lead cross-functional groups in delivering high-performance designs that adhere to stringent timelines and quality standards.
Bp Ceng's technical acumen is particularly evident in his work on advanced analog design and high-performance I/O, including DDR4 analog front-end (AFE) solutions. His hands-on experience in designing cutting-edge 0.999u2 bitcells in 90nm technology at leading foundries like Samsung and Chartered Semiconductor underscores his deep understanding of VLSI and CMOS technologies. He is also recognized for his expertise in signal and power integrity, ensuring that designs not only meet performance benchmarks but also maintain reliability and robustness.
In his role, Bp Ceng is the key owner of process technology selection and technical due diligence, ensuring that eASIC remains at the forefront of "more than Moore" design methodologies. His focus on design-process co-optimizations and chip-package co-design further enhances the efficiency of the development cycle, enabling the creation of sophisticated System on a Chip (SoC) solutions. With a comprehensive skill set that includes debugging, low power design, and design for manufacturability (DFM), Bp Ceng continues to push the boundaries of semiconductor innovation, positioning eASIC as a leader in the industry.
Senior Director at eASIC in July 2014 to Present
Chief Engineer/ Senior Director at Lattice Semiconductor in May 2011 to June 2014
Design Consultant at Consultant in January 2009 to May 2011
Director Design Methodology at Chartered Semiconductor in March 2006 to November 2008
Senior Engineering Manager at Nvidia in December 2002 to March 2006
Senior Manager at Sun Microsystems in January 1998 to November 2002
Department manager at AMD in January 1997 to January 1998
Senior Manager at Silicon Graphics in January 1996 to January 1997
Senior circuit designer at Microunity in January 1991 to January 1996
Section manager at Cypress Semiconductor in January 1984 to January 1991
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Semiconductors
Physical Design
CMOS
VLSI
Circuit Design
Integrated Circuit Design
IC
Semiconductor Industry
ASIC
Microprocessors
Silicon
Mixed Signal
SoC
FPGA
Design for Manufacturing
Engineering Management
Testing
Signal Integrity
DFM
Electronics
Hardware Architecture
Processors
Design Methodology
Power Analysis
Digital Electronics
High Performance Computing
Low-power Design
Analog Circuit Design
Debugging
Analog
Functional Verification
SystemVerilog
Analog Design
Low Power Design
Digital Design
Application-Specific Integrated Circuits (ASIC)
Field-Programmable Gate Arrays (FPGA)
System on a Chip (SoC)
Integrated Circuits (IC)
Very-Large-Scale Integration (VLSI)
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Discover more about eASICWhat is Bp Ceng email address?
Email Bp Ceng at [email protected]. This email is the most updated Bp Ceng email found in 2026.
What is Bp Ceng phone number?
Bp Ceng phone number is +14086858504 and +15132360210.
How to contact Bp Ceng?
To contact Bp Ceng send an email to [email protected]. If you want to call Bp Ceng try calling on +14086858504 and +15132360210. (updated on September 13, 2024)
What is Bp Ceng net worth?
Bp Ceng has an estimated net worth of $750,000 to $999,999
What company does Bp Ceng work for?
Bp Ceng works for eASIC
What is Bp Ceng's role at eASIC?
Bp Ceng is Senior Director
What industry does Bp Ceng work in?
Bp Ceng works in the Semiconductor Manufacturing industry.
Bp Ceng Email Addresses
Bp Ceng Phone Numbers
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