Wai Y WongStaff Engineer, Circuit Design Engineer, IBM STG - GP, GPUL, Power5 / 5+ / 6 / 6+ / 7 / 7+ / z360
Greater New York City Area
Staff Engineer, Circuit Design Engineer, IBM STG - GP, GPUL, Power5 / 5+ / 6 / 6+ / 7 / 7+ / z360
Staff Engineer, Unit Timing Lead, IBM STG - Power6 / 6+ / 7 / 7+
Staff Engineer, Cycle Reach Data, IBM STG - Power6 / 6+ / 7 / 7+
Staff Engineer, Power Nest Lead, IBM STG - Power7
Staff Engineer, Custom Layout Design, IBM - Pulsar, GP, GPUL, Power5 / 5+ / 6 / 6+
Staff Engineer, Application Engineer for Data Auditing, IBM STG - Power6 / 6+
Staff Engineer, Test floor Assignment, IBM STG - Power6
Engineer, Custom Layout Design, IBM PowerPC 604ev, PowerPC 604e (Mach5) and System 390 G5 (Alliance)
Senior Associate Engineer, Custom Layout Design, IBM PowerPC 604e and PowerPC 615
Associate Engineer, Custom Layout Design, IBM PowerPC 604
City University of New York City College
Recommendations: 1
VLSI
Debugging
Unix
Computer Architecture
Semiconductors
Digital Circuit Design
Physical Design
Static Timing Analysis