Top Principal Hardware Engineers in Santa Clara, California

Fengming Zhang
Hardware Design Internship
Santa Clara, California
Hardware Design Internship
Principal Physical Design Engineer
Senior Hardware Engineer
Senior Member of Technical Staff
Member of Technical Staff
Hardware Design Engineer
Hardware Design Engineer
Senior Technical Leader
Principal Hardware Engineer
Northeastern University
Beijing University of Chemical Technology
Beijing University of Chemical Technology
Recommendations: 3
Verilog
EDA
SPICE
Static Timing Analysis
Physical Design
Microprocessors
CMOS
Cadence
Shaowei Deng
Technical Leader / Signal Integrity Engineer
Santa Clara, California
Technical Leader / Signal Integrity Engineer
MTS / Signal Integrity Engineer
Signal Integrity Engineer
Signal and Power Integrity Lead / Manager, Autopilot Hardware
Principal Hardware Engineer / Signal Integrity
Missouri University of Science and Technology
Fudan University
Recommendations: 0
Signal Integrity
PCIe
SERDES
SPICE
Hardware Architecture
PCB design
ASIC
Verilog
Socrates Demetriades
Senior Technical Member of Radeon GPU Performance/Power
Santa Clara, California
Senior Technical Member of Radeon GPU Performance/Power
Principal Hardware Engineer - SPARC CPU Performance
Graduate Intern
Research Assistant - Computer Architecture, Systems and Technology Lab
Instructor and Teaching Assistant
University of Pittsburgh
University of Patras
Recommendations: 0
Computer Architecture
Computer Hardware
Computer Science
Computer Engineering
Machine Learning
LaTeX
Algorithms
Software Engineering
Hendra Soeleman
Hardware Engineer
Santa Clara, California
Hardware Engineer
Principal Hardware Engineer
Circuit Design Engineer
Technical Consultant
Co-Lead/Facilitator
Sr Circuit Design Engineer
Principal Consultant
Purdue University
The University of Texas at Austin
Recommendations: 0
Arjuna Ekanayake
Principal Hardware Engineer
Santa Clara, California
Principal Hardware Engineer
Staff Design Engineer (CAE)
Engineering at Microchip
Principal Engineer
Sr. R&D Lead Product Engineer
Stanford University
University of Rochester
Recommendations: 0
SoC
Integrated Circuit Design
Perl
EDA
ASIC
FPGA
Verilog
Physical Design
Tzuchun Ku
Senior CAD Engineer
Santa Clara, California
Senior CAD Engineer
Principal Hardware Engineer
Sr. Staff Engineer
University of Southern California
Old Dominion University
Recommendations: 0
Yiou Li
Senior Hardware Engineer
Santa Clara, California
Senior Hardware Engineer
Senior Principal Hardware Engineer
Principal Hardware Engineer
Duke University
Duke University
Recommendations: 0
Perl
System Architecture
SPARC
X86
Solaris
Unix
Verilog
Embedded Systems