Top Principal Hardware Engineers in Greater Seattle Area
Alan Jovanovich
Principal Hardware Engineer (Signal Integrity)
Greater Seattle Area
Principal Hardware Engineer (Signal Integrity)
MTS: Signal Integrity
Engineer for Signal Integrity, RF, and Microwave Design
Consultant Engineer, Signal Integrity, RF, and Microwave Design
Principal Engineer and Sr Principal Engineer
RF engineer
Seattle Pacific University
Washington State University
Washington Technical Institute
Recommendations: 10
Embedded Systems
Debugging
ASIC
PCB design
Firmware
Cadence
Circuit Design
Embedded Software
r****[email protected]
Wade Doll
Principal Systems Infrastructure Architect
Greater Seattle Area
Principal Systems Infrastructure Architect
Principal Systems Engineer, Mechanical Eng Supervisor
Principal Hardware Engineer
Engineering Manager
Project Engineer
Project Engr / Engr Manager
Cogswell College North
Recommendations: 1
Mechanical Engineering
CFD
Finite Element Analysis
Engineering Management
Machine Design
Computer Hardware
Thermal System Design
CAD
w****[email protected]
Yongseok Yi
Senior Staff Engineer
Greater Seattle Area
Senior Staff Engineer
Principal Hardware Engineer
Digital Hardware Engineer
Senior Electrical Engineer
Digital Hardware Engineer
Senior ASIC/SOC Engineer
Korea Advanced Institute of Science and Technology
Korea Advanced Institute of Science and Technology
Korea Advanced Institute of Science and Technology
Recommendations: 0
System Architecture
SoC
Verilog
C
C++
Memory Management
Perl
Unix
y****[email protected]
Jeremy Braun
Principal Hardware Engineer
Greater Seattle Area
Principal Hardware Engineer
Electrical Engineer
EE
Massachusetts Institute of Technology
Recommendations: 0
Debugging
Embedded Systems
Software Design
Hardware Architecture
Software Engineering
Device Drivers
Testing
Electrical Engineering
j****[email protected]
Ming Liu
Senior Research Hardware Engineer
Greater Seattle Area
Senior Research Hardware Engineer
Principal Hardware Engineer
Research Intern
Memory IP Intern
Software Engineering Intern
NSERC Research Student
Research and Teaching Assistant
ASIC Design Verification Intern
Audio Engineer Associate
Massachusetts Institute of Technology
Massachusetts Institute of Technology
University of Toronto
Recommendations: 0
Verilog
FPGA
Computer Architecture
Hardware Architecture
C++
C
Linux
Matlab
m****[email protected]
m****[email protected]
Len Sanderson
Principal ASIC Design Engineer
Greater Seattle Area
Principal ASIC Design Engineer
Senior Design Engineer
Senior Hardware Engineer
Principal Hardware Engineer, Microsoft Quantum
Senior Hardware Engineer
Principal ASIC Design Engineer
Senior Staff Engineer
Product Test Engineer
Sr. Hardware Engineer, Technical Lead for Gemini Network ASIC
Senior Hardware Engineer, Timing & Noise Closure for Aries Network ASIC
Senior R&D Program Manager, “Chip Lead” of Cray’s next generation NIC ASIC
Recommendations: 0
l****[email protected]
Chris BeSerra
Principal Hardware Engineer
Greater Seattle Area
Principal Hardware Engineer
Sr Hardware Engineer
Senior Hardware Development Engineer
University of Washington
Recommendations: 0
Server Architecture
IPMI
Technical Leadership
Task Force Management
Processors
Hardware Architecture
Embedded Systems
Firmware
c****[email protected]
