Top IC Design Engineers in Greater Seattle Area
Shirin Hallaji
Component Design Engineer (Fabric Design and Validation Engineer)
Greater Seattle Area
Component Design Engineer (Fabric Design and Validation Engineer)
Analog Engineer (Signal Integrity)
Component Design Engineer (Quality and Reliability Engineer)
IC Design Engineer (Intern)
San Jose State University
University of Saskatchewan
Recommendations: 5
Analog Circuit Design
VLSI
Analog
IC
Integrated Circuit Design
Semiconductors
Signal Integrity
SoC
s****[email protected]
Brad Booth
ASIC Design Engineer
Greater Seattle Area
ASIC Design Engineer
Director of Technology
Chair of the Board
University of Victoria
PGSS
Recommendations: 2
Ethernet
Microsoft Office
Semiconductors
Networking
IP
System Architecture
Cloud Computing
Data Center
b****[email protected]
Kevin Hubbard
Software Engineer Internship
Greater Seattle Area
Software Engineer Internship
ASIC Design Engineer
ASIC Design Engineer
Electrical Engineering Intern
Electrical Engineer, Founder, CEO and CTO apparently.
ASIC Design Engineer
Hardware Design Engineer
ASIC Design Engineer
University of Washington
Bothell High School
Recommendations: 2
k****[email protected]
Ahmad Reza Fazel
Firmware Engineer
Greater Seattle Area
Firmware Engineer
Embedded Firmware Engineer
Firmware Engineer
ASIC Design Engineer
Research Assistant
University of Waterloo
Shiraz University
Recommendations: 1
a****[email protected]
Aaron Edwards
FPGA Software Engineer
Greater Seattle Area
FPGA Software Engineer
ASIC Design Engineer
Adjunct Faculty
Research Assistant
Lab Assistant
Cashier
Boise State University
Eatonville High School
Recommendations: 0
Verilog
SystemVerilog
RTL Design
SSD Storage Technology
Microsoft Office
UVM
VHDL
Linux
a****[email protected]
Tony Blair
Electrical Engineer Sr, Staff
Greater Seattle Area
Electrical Engineer Sr, Staff
Senior FPGA Designer
ASIC Design Engineer
Senior Product Design Engineer
ASIC/FPGA Design Engineer
Seattle University
Recommendations: 0
FPGA
ASIC
Circuit Design
Embedded Systems
Logic Design
Integrated Circuit...
Digital Signal...
Ethernet
t****[email protected]
Ba Nguyen
Manager, QVS Engineering
Greater Seattle Area
Manager, QVS Engineering
Principal ASIC/FPGA Engineer - Technical Lead - ASIC/FPGA
Sr. ASIC Design Engineer
Principal Design Engineer
Principal Design Engineer
University of Portland
Recommendations: 0
Perl
C++
ClearCase
Quartus
Primetime
StarTeam
VHDL
ASIC
x****[email protected]
Craig Nemecek
Senior Design Engineering Manager
Greater Seattle Area
Senior Design Engineering Manager
Principal Design Engineer
Staff Design Engineer
Design Engineering Director
Senior Design Engineer
IC Design Engineer
Design engineer
Senior Director of Engineering
Carnegie Mellon University
Recommendations: 0
SoC
Mixed Signal
IC
Verilog
ASIC
Semiconductors
n*****@cypress.com
Len Sanderson
Principal ASIC Design Engineer
Greater Seattle Area
Principal ASIC Design Engineer
Senior Design Engineer
Senior Hardware Engineer
Principal Hardware Engineer, Microsoft Quantum
Senior Hardware Engineer
Principal ASIC Design Engineer
Senior Staff Engineer
Product Test Engineer
Sr. Hardware Engineer, Technical Lead for Gemini Network ASIC
Senior Hardware Engineer, Timing & Noise Closure for Aries Network ASIC
Senior R&D Program Manager, “Chip Lead” of Cray’s next generation NIC ASIC
Recommendations: 0
l****[email protected]
Jeff Erickson
Director, Strategic Sourcing
Greater Seattle Area
Director, Strategic Sourcing
Senior Strategic Sourcing Manager
Design Engineering Manager
TrueTouch Product Marketing Manager
Staff IC Design Engineer
University of Washington
University of Washington
Recommendations: 0
Mixed Signal
SoC
ASIC
RTL design
Product Marketing
Embedded Systems
Product Management
Verilog
j****[email protected]
Shan H.
Software Engineer
Greater Seattle Area
Software Engineer
Software Engineer
Senior ASIC Design Engineer
Design Engineering Intern
UCLA
Huazhong University of Science and Technology
Recommendations: 0
h****[email protected]
Patrick Kwan
Hardware Validation Manager
Greater Seattle Area
Hardware Validation Manager
Compatibility Validation Engineer
Software Development Manager
Software Engineering Manager
Software Developer
ASIC Design Engineer
Arizona State University
University of Washington
University of Washington
Recommendations: 0
SoC
Debugging
Device Drivers
Kernel Debugging
Program Management
People Development
OEM Management
Computer Architecture
