Top ASIC Engineers in Greater Minneapolis-St. Paul Area
Michael Burns
ASIC Engineer
Greater Minneapolis-St. Paul Area
ASIC Engineer
ASIC/FPGA Design Engineer
Electrical Engineer Intern
Senior UNIX Systems Administrator
UNIX Systems Administrator
University of Minnesota, Twin Cities
University of Minnesota-Twin Cities
University of Minnesota-Twin Cities
Recommendations: 1
System Administration
C
Python
Perl
Unix
Linux
Solaris
Verilog
m****[email protected]
Brad Mennicke
Jr. Engineer
Greater Minneapolis-St. Paul Area
Jr. Engineer
Electrical Engineering Manager
Principal Hardware Engineer
FPGA/ASIC Design Consultant
Hardware Engineer
Staff Electrical Engineer
Advanced ASIC Engineer
Senior Hardware Engineer
Recommendations: 0
Verilog
VHDL
Hardware
Hardware Architecture
ASIC
Debugging
Functional Verification
Simulations
b****[email protected]
Ted Seward
Principal ASIC Verification Engineer
Greater Minneapolis-St. Paul Area
Principal ASIC Verification Engineer
Senior Staff ASIC Engineer
Lead ASIC Engineer
Senior ASIC Engineer
Senior ASIC Engineer
University of Wisconsin-Madison
St. Olaf College
Recommendations: 0
ASIC Verification Metholodogy
Object Oriented Programming
SystemVerilog
Xilinx
VMM
Perl
VCS
ASIC
t*****@sewards.org
Michael Steiner
Senior Staff ASIC Engineer
Greater Minneapolis-St. Paul Area
Senior Staff ASIC Engineer
Principal ASIC Engineer
ASIC Engineer
ASIC Engineer
Principal ASIC Engineer
Principal Engineer
Principal Hardware Design Engineer
Marquette University
Recommendations: 0
ASIC
Verilog
FPGA
Debugging
ARM
SystemVerilog
SoC
Semiconductors
m****[email protected]
m****[email protected]
