Sastry Karraperi, SMTS ASIC/ Layout Design Engineer at AMD

Sastry Karraperi

SMTS ASIC/ Layout Design Engineer at AMD | San Jose, California, United States

Profile last verified June 2026
Semiconductors Verified Profile San Jose, California, United States Andhra University
Verified

Personal Email

***@gmail.com

Personal • High Confidence

Phone Number

(213) ***-*201

United States • Phone

Free account · No credit card · 5 profiles/month

Sastry Karraperi Socials
Sastry Karraperi Work Experience

SMTS ASIC/ Layout Design Engineer at AMD in August 2011 - Present

Sastry Karraperi Education

Andhra University

About Sastry Karraperi’s Current Company
AMD

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_

Discover more about AMD
Sastry Karraperi’s Colleagues
Sumit Sangtani

Sumit Sangtani

Seattle, Washington, United States

Software Development Engineer at AWS | Ex-AMD, Accelya

Software Development Engineer at Amazon Web Services (AWS)
(November 2024 – Present)

Karthik Ashoka

Karthik Ashoka

San Jose, California, United States

MTS Silicon Design Engineer - AI Engine @AMD

Design Verification Engineer at AMD
(August 2021 – Present)

Abhinav Chilakamarri

Abhinav Chilakamarri

Santa Clara, California, United States

Verification Engineer at Qualcomm

Verification Engineer at Qualcomm
(October 2024 – Present)

Sudarshan Shettigar

Sudarshan Shettigar

Santa Clara, California, United States

CPU Core Design at AMD | ASU | SSSIHL

Sr. Silicon Design Engineer at AMD
(December 2023 – Present)

Phanindra Vemireddy

Phanindra Vemireddy

Portland, Oregon, United States

Digital Design Engineer at TI | Cores Verification Intern at AMD | MS ECE @ PSU | B.Tech @ IIT Palakkad

Digital Design Engineer at Texas Instruments
(July 2024 – Present)

Aditya Venkatraman

Aditya Venkatraman

San Jose, California, United States

Experienced ASIC design engineer with over 6 years of experience in ASIC/FPGA Design looking for challenging roles

Sr Silicon Design Engineer at AMD
(May 2021 – Present)

Search similar profiles
Frequently asked questions about Sastry Karraperi

What is Sastry Karraperi email address?

Email Sastry Karraperi at [email protected] and [email protected]. This email is the most updated Sastry Karraperi's email found in 2026.

How to contact Sastry Karraperi?

To contact Sastry Karraperi send an email to [email protected] or [email protected]. (updated on June 2026)

What company does Sastry Karraperi work for?

Sastry Karraperi works for AMD.

What is Sastry Karraperi's role at AMD?

Sastry Karraperi is SMTS ASIC/ Layout Design Engineer

What industry does Sastry Karraperi work in?

Sastry Karraperi works in the Semiconductors industry.

Find anyone, anywhere
with ContactOut today

Making remote or global hires? Connecting
with key decision-makers? We can help.

  • 40 emails / month
  • 3 phone numbers / month
  • Works on standard LinkedIn only
  • Work emails, personal emails,
    mobile numbers
* 1 user per company limit

No credit card required

Try ContactOut for Free