Jigish Shukla's Email Addresses & Phone Numbers

📖 Summary

FPGA HARDWARE DEVELOPMENT EXPERIENCE Experience creating market feed handlers over IPv4 and UDP/TCP handling NYSE Euronext Data at 1 GB/s and 10 GB/s on Virtex 5. Extensive experience with Verilog/VHDL coding, Design for testing (DFT), OVM, UUM, logic synthesis, FPGA based systems development (Xilinx/Altera) products. IP core development, design verification, simulation and test bench development. Developed HDL test benches for high speed chips. Experience with Virtex 5, 6 and 7 devices. 1GB and 10 GB Ethernet. Developed and used FPGA based emulation platforms. Extensive use of logic analyzers and digital oscilloscopes for design debug and bring up. Experienced with Ethernet, USB 2.0, sensors, and digital signal processing. Experience in developing Embedded Software (C++) for DSP and microcontroller devices. Experience writing MATLAB code for Xilinx devices. Ability to manage projects from concept through design, verification and production. IPv6 and Ethernet frame experience. Experience with Xilinx Plan Ahead and Artix (Spartan -7) based systems. FIRMWARE DEVELOPMENT EXPERIENCE Extensive experience with ATMEL 8051. Experience with Microchip MPLAB, IAR systems embedded development suite. PIC microcontrollers. TI MSP-430 microcontrollers. Have worked with C and assembly. Experience in developing Embedded Software (C++) for DSP and microcontroller devices. Experience with I2C, SPI, GPS, RS232, RS485, Ethernet, and USB 2.0. SOFTWARE EXPERIENCE Extensive experience C++, C# and assembly. Experience with MATLAB. Experience with different Linux Distributions such as Red Hat and FREEBSD. Featured Engineer on EEWEB: http://www.eeweb.com/spotlight/interview-with-jigish-shuklaSenior Embedded Firmware Engineer @ -Design System Verilog firmware. -Design/Test C++ firmware. -Design/Test FPGA systems with Xilinx Microblaze. -Layout/ Design High Speed PCBs. From September 2012 to January 2013 (5 months) Electronics/ Electrical Engineer @ -Design and implement a Latency Measurement Instrument on FPGA with 62 nanosecond latency. -Design testing units based on field programmable gate arrays (FPGA) using VHDL for testing major radar and beacon -Design printed circuit board layouts using Cadence OrCAD. -Design and implement analog and digital circuitry. systems such as the ASR-11/ASR-9 and ADS-B. -Redesign existing systems with modern technology architectures. -Program Windows software that will communicate with custom designed test systems. From September 2007 to October 2012 (5 years 2 months) System Engineer @ -Generate requirements documents (Product Spec, HRS, SRS) -Perform requirements analysis & allocation. -Model/simulate system performance and conduct analysis -Support test engineering to develop the test strategy to meet the requirements listed in the Statement of Work. From July 2007 to September 2007 (3 months) FPGA/ Embedded Systems Researcher @ -Test, evaluate and design FPGA based software radio systems. -Troubleshoot VHDL implementation of research projects for proper functionality. -Design and implement a digital spectrum analyzer in Verilog for research purposes. Research: GPS System (System on Chip From February 2007 to June 2007 (5 months) Electrical Engineering CO-op @ -Program microcontroller firmware in C++. -Program Windows software that will communicate with custom designed test systems. From January 2007 to June 2007 (6 months) Group Leader @ -Design, verify and test SDRAM controller, Memory BIST, and JTAG controller in Verilog. -Consult and aid ARM processor team to design and test the processor. -Implement the FPGA realization of the chip on Xilinx Virtex 4. Research From January 2006 to May 2006 (5 months) PC Support Technician @ -Program DOS-batch files to implement back-ups on BMS servers. -Provide computer support for over 20 to 30 different types of Windows/Linux based software. From June 2005 to August 2005 (3 months) Master of Science, Systems Engineering @ Stevens Institute of TechnologyBachelor of Science, Electrical and Computer Engineering @ Rutgers Universityedison high Jigish Shukla is skilled in: Verilog, VHDL, System Verilog, Xilinx FPGAs, Altera FPGAs, TI MSP 430 Microcontrollers, TI DSPs, MATLAB, C++, C#, A/D Converters, FPGA design, FPGA, Matlab