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Brian Cassell


SMTS Silicon Design Enginer at AMD

Somerville, Massachusetts

Section title

Brian Cassell's Email Addresses & Phone Numbers

Brian Cassell's Work Experience



2003 to 2003

Marvell Semiconductor

Staff Engineer

August 2018 to April 2020

Marlborough, MA

Cavium Inc

Principal Engineer

July 2013 to April 2020

Marlborough, MA

Brian Cassell's Education

Boston University

M.S., Computer Systems Engineering

2000 to 2005

Brian Cassell's Professional Skills Radar Chart

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56% Left Brained
44% Right Brained

Brian Cassell's Estimated Salary Range

About Brian Cassell's Current Company


Frequently Asked Questions about Brian Cassell

What company does Brian Cassell work for?

Brian Cassell works for Digitalks

What is Brian Cassell's role at Digitalks?

Brian Cassell is Intern

What is Brian Cassell's personal email address?

Brian Cassell's personal email address is b****[email protected]

What is Brian Cassell's business email address?

Brian Cassell's business email addresses are not available

What is Brian Cassell's Phone Number?

Brian Cassell's phone (413) ***-*221

What industry does Brian Cassell work in?

Brian Cassell works in the Semiconductors industry.

About Brian Cassell

đź“– Summary

Intern @ Digitalks From 2003 to 2003 (less than a year) Staff Engineer @ Marvell Semiconductor From August 2018 to April 2020 (1 year 9 months) Marlborough, MAPrincipal Engineer @ Cavium Inc *Lead Engineer*ARMv8 Processor Verification- Octeon TX2- ThunderX/Octeon TX From July 2013 to April 2020 (6 years 10 months) Marlborough, MASenior Design Engineer @ AMD SOC15 Scalable Data Fabric VerificationUnified NorthBridge Verification From July 2011 to June 2013 (2 years) Boxborough, MASenior Verification Engineer @ NVIDIA Project Denver From July 2009 to June 2011 (2 years) Bedford, MAHardware Engineer @ SiCortex Current:Microprocessor Verification - MIPS64Past:Software TestingDiagnosticsFunctional VectorsASIC Verification - JTAG, I2C, UART, PLLs, DFT logic, BIST, various SoC internalsResponsibilities include developing testplans, block and chip-level testbenches, bfms, protocol checkers, predictors/models, functional coverage, and specification validation.Experience with commercial and open tools (e.g. Cadence,; MIPS asm, C, C++, SystemC, Verilog, perl, bash, logic analyzer, ... From October 2005 to May 2009 (3 years 8 months) Maynard, MASMTS Silicon Design Enginer @ AMD Graphics IP Boxborough, MA

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In a nutshell

Brian Cassell's Personality Type

Introversion (I), Intuition (N), Thinking (T), Judging (J)

Average Tenure

2 year(s), 10 month(s)

Brian Cassell's Willingness to Change Jobs



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