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Travis Williams

SENIOR FPGA FIRMWARE(FW) DESIGNER (Aerotek Contractor) @ UTC Aerospace Systems

Travis Williams Contact Details

Location:
Phoenix, Arizona
Work:
SENIOR FPGA FIRMWARE(FW) DESIGNER (Aerotek Contractor) @ UTC Aerospace Systems
SENIOR FPGA FIRMWARE(FW) DESIGNER - Embraer MLJ/MSJ (CDI CONTRACTOR ) @ Parker Hannifin Corporation
SENIOR FPGA DESIGNER - APR - 39 (AEROTEK CONTRACTOR ) @ Northrop Grumman Corporation
Education:
@ Arizona State University
About:

QUALIFICATIONS: - Bachelor of Science in Electrical Engineering (BSEE) - Completed nine(9) credit hours towards Master of Science in Electrical Engineering (MSEE) - 14 years of FPGA Design Experience Xilinx: Spartan 3, Virtex 2, Virtex 2 Pro, Virtex 4, Virtex 5, Virtex 6, Altera Cyclone III, Stratix and Lattice) - VHDL and Verilog coding for synthesis, simulation, 

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