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Romil Garg's Email and Phone

Lead DFT engineer @ NVIDIA

Romil Garg's Email

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Location Sunnyvale, California
Lead DFT engineer @ NVIDIA
Sr. DFT Engineer @ NVIDIA
DFT engineer @ NVIDIA
Masters in EE @ University of Cincinnati
DFT Engineer @ Lantiq
@ University of Cincinnati
@ Thapar Institute of Engineering and Technology
@ S.D.P Public School

DFT engineer @ - DFT Planning and RTL implementation on GPU chips. - ATPG-stuck-at/transition - GLS - Post silicon debug and support From April 2013 to Present (2 years 9 months) Masters in EE @ From August 2012 to April 2013 (9 months) United StatesDFT Engineer @ DFT Engineer at Lantiq From February 2012 to July 2012  see more

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