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Reynold Leong

Senior Principal Engineer @ QLogic (via Pathscale acquisition 4/06)

Reynold Leong Contact Details

San Francisco Bay Area
Senior Principal Engineer @ QLogic (via Pathscale acquisition 4/06)
Member of Technical Staff, Design @ Silicon Graphics
Principal Engineer @ SK hynix memory solutions inc.
MS @ University of California, Irvine

Specialties: SystemVerilog & UVM, Verilog, VERA & RVM, VHDL, Perl, On the side: Python, JavaScript, jQuery, MySQL, PHP, .NET

Principal Engineer @ acquired PCIE group from Violin Memory From June 2014 to Present (1 year 7 months) Sr. Verification Engineer @ From August 2011 to June 2014 (2 years 11 months) Consultant @ From August 2010 to August 

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