Priyanka Kukade’s Email & Phone

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Priyanka Kukade

Senior Design Verification Engineer @ NVIDIA

Priyanka Kukade Contact Details

San Francisco Bay Area
Senior Design Verification Engineer @ NVIDIA
Design Verification Engineer @ NVIDIA
ASIC/Verification Intern @ NVIDIA
@ University of Pune

Interested in: RTL Design, Digital Logic Design, ASIC Design, Design Verification, Computer Architecture, Embedded Systems design Experience in: Design Verification, Logic Design, Embedded System Design

Verification Engineer @ From July 2014 to Present (1 year 4 months) Santa ClaraASIC/Verification Intern @ • Functional verification of instruction flow controller, event handler and instruction retirement unit. • Analyzing and improving 

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