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Mike Basanty

VP Operations @ Velogix, Inc.

Vice President, Semiconductor Operations & Quality

San Jose, California

Ranked #1,373 out of 27,460 for VP Operations in California

Section title

Mike Basanty's Email Addresses & Phone Numbers

Mike Basanty's Work Experience

Velogix, Inc.

VP Operations

2006 to February 2007

Santa Clara, CA

Trident Microsystems

Director, Product/Test Engineering

September 1996 to March 1999

Mountain View, CA

LSI Logic

Sr. Manager, Product/Test Engineering

July 1988 to September 1996

Milpitas, CA

Mike Basanty's Education

UC Berkeley, & Santa Clara University

Mike Basanty's Professional Skills Radar Chart

Based on our findings, Mike Basanty is ...

Methodical
Resourceful
Cause-and-effect oriented

What's on Mike Basanty's mind?

Based on our findings, Mike Basanty is ...

52% Left Brained
48% Right Brained

Mike Basanty's Estimated Salary Range

About Mike Basanty's Current Company

Velogix, Inc.

Establish and manage Manufacturing and Engineering infrastructure for fabless semiconductor IC provider of high-end FPGA products

Frequently Asked Questions about Mike Basanty

What company does Mike Basanty work for?

Mike Basanty works for Velogix, Inc.


What is Mike Basanty's role at Velogix, Inc.?

Mike Basanty is VP Operations


What is Mike Basanty's personal email address?

Mike Basanty's personal email address is m****[email protected]


What is Mike Basanty's business email address?

Mike Basanty's business email addresses are not available


What is Mike Basanty's Phone Number?

Mike Basanty's phone (213) ***-*263


What industry does Mike Basanty work in?

Mike Basanty works in the Semiconductors industry.


About Mike Basanty

­čôľ Summary

VP Operations @ Velogix, Inc. Establish and manage Manufacturing and Engineering infrastructure for fabless semiconductor IC provider of high-end FPGA products From 2006 to February 2007 (1 year) Santa Clara, CADirector, Product/Test Engineering @ Trident Microsystems Engineering management for fabless IC design and manufacturing of graphics and multimedia products ($200M/yr revenue) From September 1996 to March 1999 (2 years 7 months) Mountain View, CASr. Manager, Product/Test Engineering @ LSI Logic Product/Test Engineering management for the Consumer and Video Products Division for this public IDM company, growing revenue from $5M to $250M over 8 years From July 1988 to September 1996 (8 years 3 months) Milpitas, CAManager, R&D Product Engineering @ IDT Corporation Managed CMOS process technology development through SRAM product characterization, failure/yield analysis, and reliability tests From 1987 to 1988 (1 year) Santa ClaraVice President Operations & Quality @ eASIC Corporation (M&A Intel 2018) Corporate Manufacturing & Quality management, fabless semiconductor programmable IC products company Santa Clara, CAVP Manufacturing Operations @ Optichron, Inc. (M&A by NetLogic/Broadcom) Executive management of Manufacturing & Engineering Operations for privately held fabless semiconductor supplier of wireless communications IC products From March 2007 to May 2011 (4 years 3 months) Fremont, CASr. Director, Product/Test Engineering Operations @ Cypress Semiconductor Manage Product & Test Engineering Operations for Data Communications Division ($60M/yr revenue) From August 2004 to 2005 (1 year) San Jose, CASr. Director / VP Operations @ Azanda Network Devices (M&A with Cortina Systems) Establish Manufacturing Engineering & manage Operations for private fabless IC provider of Network co-processors and traffic management IC products. From April 2001 to November 2004 (3 years 8 months) Sunnyvale, CASr. Director, Engineering/Operations @ Cirrus Logic Worldwide Operations & Engineering management of the Magnetic and Optical Storage Products Divisions ($400M/yr combined revenue) From March 1999 to April 2001 (2 years 2 months) Fremont, CASr. Process/Product Engineer @ Intel Corporation - Sr. Product Engineer: Intel 80286 (16-bit CPU) ATE test development, product characterization, debug, failure analysis, reliability tests, production release, yield enhancement. Interfaced with three wafer fabs worldwide (CA, NM, Israel).- Foundry Manager: Managed outsourced foundry for Intel sub-micron CMOS process, including process qual & yield improvement- Fab Process/Device Engineer: Developed/managed fab process E-Test (PCM) for qualification, monitoring, wafer-sort/final-test yield correlation. From August 1982 to July 1987 (5 years) Santa Clara, CA


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In a nutshell

Mike Basanty's Personality Type

Introversion (I), Sensing (S), Thinking (T), Perceiving (P)

Average Tenure

3 year(s), 2 month(s)

Mike Basanty's Willingness to Change Jobs

Unlikely

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