Skills and Experience Highlights:
High Speed digital hardware design, FPGA based system, Xilinx 7-series, Zynq Soc, Altera and Lettice FPGAs and SoC, Xilinx FPGA system desing using ISE/Vivado, Altera’s QuartusII, Verilog and VHDL coding, ModelSim for HDL simulator, Xilinx/Altera SDK C programing, OrCad/Mentor Graphics/Altium schematics design tools, OrCAD PCB SI, HyperLynx SI tool, small team with Jr
Skills and Experience Highlights:
High Speed digital hardware design, FPGA based system, Xilinx 7-series, Zynq Soc, Altera and Lettice FPGAs and SoC, Xilinx FPGA system desing using ISE/Vivado, Altera’s QuartusII, Verilog and VHDL coding, ModelSim for HDL simulator, Xilinx/Altera SDK C programing, OrCad/Mentor Graphics/Altium schematics design tools, OrCAD PCB SI, HyperLynx SI tool, small team with Jr engineers, summer interns and Technician managing skill etc.
Sr. Hardware Engineer @ From April 2015 to Present (9 months) Colorado Springs, Colorado AreaDigital HW Staff Engineer R&D @ • Most recent design project: Design HPC(High Performance Comp) Xilinx ZYNQ SoC system with DDR3, eMMC, QSPI, USB, GigE, PCIe, I2C, SPI etc.
• Digital hardware design with FPGA/CPLD based system
• Architecture design for Digital hardware/firmware system
• Run pre/post PCB SI simulation for high-speed design
• Design FPGA/CPLD RTL in Verilog code
• Design complex digital power sequence for FPGA and embedded system with Lattice CPLD
• Design digital power supply circuit for Xilinx FPGA/CPLD (Zynq, Spartan-6, Kintix-7 etc)
• Designing Xilinx Spartan-6 and Kintex 7 based FPGA logic board.
• Design and implement PCIe, SPI, USB 2.0, I2C, UART, RS232, DDR3, High speed ADC/DAC interface etc.
• Using ISE/Vivado and EDK system crate Microblaze processor and Verilog RTL
• Write hardware bring-up test
• Generate various design review documents (i.e PCB layout spec, theory of operation, design I/O requirements, OrCAD schematic, design simulation etc)
• Manage Jr Engineers, Technician and summer interns
• Wire Hardware Requirements in Doors and create Hardware specification to test with DVT From September 2011 to April 2015 (3 years 8 months) Hardware Design Engineer @ -Digital/Analog circuit design From November 2009 to September 2011 (1 year 11 months) Electronics Engineer @ · Worked on Aero-Defense electronics products (CCA cards) for Digital Circuit Design group.
· Performed Design-Try-Out (DTO) in Lab Environment on various digital/analog devices which include FPGA, CPLD, DDR, EEPROM, Flash Memory, ADC/DAC, Drivers, Interface, Clock Buffers, Operational Amplifiers, Buffer Circuits, Temperature Sensors, and ASCI Heaters.
· Write VHDL Code for Spartan and Virtex Family FPGAs and perform Simulation using Model Sim and Xilinx’s ISESim.
· Performed Investigation on alternate parts to replacement for obsolete devices with equivalent devices using I.H.S Part Universal Database.
· Write ECOs for Digital and Analog circuit boards. From May 2009 to October 2009 (6 months) Hardware Engineering @ · Modified and Redesigned Logic Circuits using FPGA and CPLD Cores to enhance performance (Xilinx, Lattice, Altera, etc.). This includes implementation and simulation of VHDL Coding using CAD simulation tools (Active-HDL 7.2, ModelSim, Xilinx ISE Simulator, etc.)
· Wrote HDL Testbench for RTL verification
· Performed hardware upgrade on digital or analog circuit boards and replacement of obsolete and End-of-Life devices with equivalent devices .
· Performed test circuit design and simulation using Pspice and LTSpice IV (Linear Tech.)
· Design, layout and schematic drawing using DxDesigner/Cadence OrCAD tools for prototype, production and replacement/alternate circuit modules
· Worked with digital data transfer protocol i.e I2C, SPI, UART (RS232), GPBI, PCI, SMbus etc
· Implemented and validated various Eagle Test products through writing test program using visual C++.
· Lab Testing and Debugging on prototype/ production circuit boards which involves Op-Amps, FET, BJT, power management devices, DAC, ADC, Level Translators, memory interface and active and RC filter circuits.
· Assist Software and Firmware engineers in development of software required for control, diagnostic testing and calibration of digital projects.
· Sustained and Supported ATE tester used for ATE tester and its resources.
· Write ECOs for Digital, analog circuit boards. From December 2007 to May 2009 (1 year 6 months) compliance Engineer @ From June 2005 to September 2006 (1 year 4 months)
Bachelor of Science (BS), Electrical and Electronics Engineering @ Northern Illinois University From 2003 to 2005 Mayank Patel is skilled in: PCB design, Analog, Circuit Design, Debugging, Electronics, Embedded Systems, Engineering, FPGA, Firmware, Hardware Architecture, Integrated Circuit Design, Microcontrollers, Microprocessors, ModelSim, Orcad
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