Maxime Bouvat-Merlin's Email Addresses & Phone Numbers

Seasoned engineering executive with outstanding leadership qualities, communications and people management skills. Proven capability to build teams, set operations and improve the execution.

Seasoned engineering executive with outstanding leadership qualities, communications and people management skills. Proven capability to build teams, set operations and improve the execution.

Experienced in roadmap planning, product management, wireless system design, chip development, validation, ramp to production, HW platform and drivers development and program management.

Strengths include experience in customer facing to drive business and strategic direction.Vice President of Engineering @ We, at QuickLogic, focus on sensor hub solutions for mobile applications (smartphones, tablets and wearables) and IoT markets.

Our solutions consists in very low power sensor hub chip and complete delivery of low footprint/high performance sensor algorithms (pedometer, activity monitoring, health/wellness applications, ...).

Head of global engineering teams (architecture, chip design/validation, CPU design, HW reference designs, algorithms development, SW debugger tool/IDE, FW/SW for Android/RTOS integration, system test and customers support). Report directly to CEO.

As a Section16 officer, I'm part of the leadership team defining the strategic directions of the company (new markets, strategic partnerships, ...). From October 2013 to Present (1 year 11 months) San Francisco Bay AreaDirector, Product Management and Technology Roadmap @ • Responsible for delivering Qualcomm Connectivity Roadmap to support the various product lines (Mobile/Computing Clients, Access Points, ...).

• Part of Sr Management team responsible for portfolio alignment/prioritization across business units and for program milestones approval.

• Responsible for Wi-Fi connectivity technology roadmap, intended to support the various product lines (consumer, mobile, access point, …).

• In charge of bringing next key technologies from paper concept to actual Plan Of Record programs, endorsed by the organization.

• Leading the execution of key priority 1 programs and hands on technical issues resolution. From June 2012 to October 2013 (1 year 5 months) San Francisco Bay AreaHead of Technical Program Management Office, Mobile Application Processor @ •Head of the Program Management Office within Mobile Application Processor Business Unit, reporting to head of Engineering.

•Lead a team of program/project managers globally dispersed in charge of executing on various chipset programs (ASIC, HW, SW and test) targeting smartphones, tablets and Enterprise phones.

•Hands on participation on critical programs, coaching/mentoring the various program managers/program teams to ensure flawless execution.

•Established and improve the Product Development Process (PDP) from business opportunity to end of life in order to drive the Business Unit to maximum efficiency (light weight process) and predictability.

•Defined scope and methodology for System Engineering, SW Integration and System Test activities. From January 2011 to July 2012 (1 year 7 months) Irvine, CADirector, Power Management IC Engineering @ •Manage cross functional teams in the areas of applications engineering, functional chip validation, SW drivers development on multiple operating systems and customers support.

•Led an organization of 3 team managers and ~25 engineers.

•Managed all administrative aspects including hiring, performance management, individual development and compensation alignment.

•Support to roadmap definition, strategic direction of the business unit, product definition and alignment at platform level.

•Defined and implemented the PMU product development process (from design kick off to end of life).

•Improved the ramp up to production process, co-working with the Operation Group (product engineering and quality groups). From September 2008 to December 2010 (2 years 4 months) Product/Program Manager, RF Subsystem @ •Manage a cross organizational 3G RF Subsystem program (which includes the latest TI DRP technology) based on customers requirements and company’s business and marketing strategy.

•Drive the system definition for the RF transceiver and the associated Power Amplifier/Front End Module (PA/FEM), PCB development using a world-wide pool of resources (US, France and Denmark).

•Lead negotiations with external customers and TI marketing teams in order to get a single RF Subsystem able to fit into the entire TI roadmap.

•Design major program’s milestones and define resource requirement and drive for execution. From September 2007 to September 2008 (1 year 1 month) Sr Manager, HW Platform Engineering @ •Managed the HW team during definition and development of the 3G platforms (including RF HW platforms). The platforms were intended for SW development and FPGA prototyping for internal and customers’ use. Validation was performed on the BaseBand boards (functionality and system/performance testing) and on RF boards (RF IC characterization, functional/system testing and RF system calibration).

•Led the HW platforms definition, development and validation steps and ensured on time/on budget delivery of the validated boards.

•Defined the board development strategy and selection of the manufacturing companies.

•Defined and led 3G subsystem silicon validation activities across USA, France and Japan ensuring functionality and performance of the WCDMA/HSDPA in a multi-site environment.

•Led an organization of four team managers and 35 engineers. Managed all administrative aspects including hiring, performance management, individual development and compensation alignment. From 2007 to 2008 (1 year) Manager, HW Platform and Support @ •Led the HW Platform and Support organization comprising of 15 engineers on site and 15 off site contractors. Managed all administrative aspects including hiring, performance management, individual development and compensation alignment.

•Drove the definition, development and validation (cost analysis, flow definition, contractor companies’ selection) for the Silicon Validation platforms.

•Led the WW process alignment across multiple TI sites in the USA, Denmark and France.

•Set strategic direction to enable the team to be part of the TI Wireless platform definition using OMAP1 or 2 core processor, GSM/GPRS/EGDE or WCDMA/HSDPA modem and TI Power IC. From 2006 to 2007 (1 year) Manager, SoC Validation @ •Managed the silicon validation activities on complex Digital IC: multi-cores processors OMAP1 or OMAP2 based, including ARM9, ARM11, TIDSP C55 based and GSM/GPRS/3G modem. The validation focused on implementing use cases to test ICs functionality and system performance.

•Drove the validation plan according to critical scenarios defined with the marketing and customers requirements.

•Set strategy for the team to ensure efficiency and cost reduction. Selected low cost external resources in India and Eastern Europe in order to reduce R&D cost and optimize operations.

•Responsible for a team of 50 internal and external engineers and project managers across 5 projects. Accountable for all aspects of line management including recruitment, staff development and performance management. From 2000 to 2006 (6 years) MA, Electronics @ Engineering School Maxime Bouvat-Merlin is skilled in: SoC, ASIC, IC, Program Management, Semiconductors, Embedded Software, WiFi, Product Management, Engineering Management, Power Management, Cross-functional Team..., Mixed Signal, Embedded Systems, Testing, Digital Signal..., ARM, Integration, Engineering, Cellular Communications, System Testing, Hardware Architecture, HW development, FW, People Development, Customer Engagement, Technology Management, Offshoring, Global Management, Leadership Development, Technical Leadership, Operations Management, Roadmap, RTL verification, Silicon Validation, Chipset, Chip Architecture, Technology Roadmapping, Strategic Planning, Prioritisation, sensor fusion, Android Development, Gesture Recognition, Low-power Design