SerDes Product Engineer at Cadence Design Systems
Cary, North Carolina, United States
Cisco
Signal Integrity Engineer
November 2018 to July 2019
San Francisco Bay Area
Cisco
Hardware Development Engineer
August 2018 to October 2018
San Francisco Bay Area
Western New England University
Graduate Student
January 2016 to December 2017
Springfield, Massachusetts Area
EffOne
Lead-Client Services
March 2014 to August 2014
bangalore area, india
Nityo Infotech
Manager Client Services
September 2013 to March 2014
Bengaluru Area, India
Cadence Design Systems
SerDes Product Engineer
San Francisco Bay Area
Accion Labs
Inside Sales Engineer
November 2012 to September 2013
Bangalore
Vijaya composite PU college
Pre-university, Electronics, 3.2
2005 to 2007
BNM Institute of Technology
Bachelor of Engineering (B.E.), Electrical, Electronics and Communications Engineering, 3.0
2007 to 2012
Vasavi Educational Trust
Schooling, High School/Secondary Diplomas and Certificates, 3.7
Western New England University
Graduate Student, Electrical, Electronics and Communications Engineering, 3.86
2016 to 2017
• Evaluate 112G Serdes evaluation boards and generate BER vs Loss profile for the desired channels.• Test high speed boards and connector boards to measure loss and crosstalk using VNA, TDR, and probe station. • Perform high speed serial interfaces modeling, Via modeling and simulations using HFSS tool.• Perform AC power analysis on voltage nets using powerSI... • Evaluate 112G Serdes evaluation boards and generate BER vs Loss profile for the desired channels.• Test high speed boards and connector boards to measure loss and crosstalk using VNA, TDR, and probe station. • Perform high speed serial interfaces modeling, Via modeling and simulations using HFSS tool.• Perform AC power analysis on voltage nets using powerSI tool to establish power delivery networks (PDN) for IC packages and boards.• Perform material extraction using Simbeor tool to obtain dk and df values for high speed boards.•Modeling and analyzing power delivery network in the ASIC Package and PCB Modeling and analyzing channels for high speed Serdes including Package, PCB, via, connectors etc.
What company does Karthik Mahesh Rao work for?
Karthik Mahesh Rao works for Cisco
What is Karthik Mahesh Rao's role at Cisco?
Karthik Mahesh Rao is Signal Integrity Engineer
What industry does Karthik Mahesh Rao work in?
Karthik Mahesh Rao works in the Semiconductors industry.
📖 Summary
Signal Integrity Engineer @ Cisco • Evaluate 112G Serdes evaluation boards and generate BER vs Loss profile for the desired channels.• Test high speed boards and connector boards to measure loss and crosstalk using VNA, TDR, and probe station. • Perform high speed serial interfaces modeling, Via modeling and simulations using HFSS tool.• Perform AC power analysis on voltage nets using powerSI tool to establish power delivery networks (PDN) for IC packages and boards.• Perform material extraction using Simbeor tool to obtain dk and df values for high speed boards.•Modeling and analyzing power delivery network in the ASIC Package and PCB Modeling and analyzing channels for high speed Serdes including Package, PCB, via, connectors etc. From November 2018 to July 2019 (9 months) San Francisco Bay AreaHardware Development Engineer @ Cisco • Designing DC-DC regulator schematics and layouts and participating in power design tests.• Developing power system designs in Cadence/Pspice CAD tools such as Orcad/Allegro.• Performing Board bring-up, board level testing on various voltage rails.• Developing and qualifying BMP Systems to meet the power requirements of new products.• Developing and executing test plans for upcoming power designs.• Documenting procedures, plans, and specifications used by the BMP team.• Assisting in the resolution of power related field / product issues for assigned projects. From August 2018 to October 2018 (3 months) San Francisco Bay AreaGraduate Student @ Western New England University • Graduate student pursuing Electrical engineering at Western New England University. Currently associated with chip design - ASIC/FPGA/logic design /Post silicon validation.• Knowledge of high speed hardware platform design for ASIC Post Silicon validation, Silicon Bug detection process, localization of Bugs and bug fixing with circuit modeling and simulation tools such as Cadence OrCAD Capture.• Knowledge of basic circuit design, test, PCB Layouts and engineering practices.• Lab experience and familiarity with basic lab equipment, including digital oscilloscopes, analog and digital voltmeters, ammeters, and advanced computer skills.• Experience in FPGA with Xilinx Vivado 2016 tool along with the Basys3 artix7 kit.• Basic knowledge of C language.• Experience in ASIC place and route with the latest Cadence SOC Encounter tool. From January 2016 to December 2017 (2 years) Springfield, Massachusetts AreaLead-Client Services @ EffOne Handled the business affairs (US/Canada) related to Big Data, BI/DW, Cloud/Saas, Open source Technologies.Account Management – Managing accounts/clients with their IT project requirements.Responsible for Staff Augmentation and IT Consulting for US/Canada regions.Establish contact with identified decision makers (Director level contacts, VP’s, CXOs) in target accounts to evaluate new business opportunities.Forecast Pipeline and general Account Management for whole US region. From March 2014 to August 2014 (6 months) bangalore area, indiaManager Client Services @ Nityo Infotech Nityo Infotech is a Global IT Services and Staffing Solutions company, head quartered in Pittsburgh, USA. The company employs over 4,500 employees globally and has its presence across 6 continents across US, EMEA, Japan, Australia and APAC region with 22 offices and 5 delivery centres in 15 countries.I handle the business affairs(US/Canada) related to Big Data,BI/DW,Cloud/Saas,Open source Technologies.I am also responsible for the business affairs of our implementation services such as Microsoft Dynamics CRM and Sharepoint.Responsible for the IT Staff Augmentation for US/Canada market. From September 2013 to March 2014 (7 months) Bengaluru Area, IndiaSerDes Product Engineer @ Cadence Design Systems San Francisco Bay AreaInside Sales Engineer @ Accion Labs Accion Labs Big Data practice assists our clients in both strategic upstream activities such as evaluating and developing big data road-map to implementation and support of large environments.Today’s business organizations are collecting vast amounts of data – varying in structure, complexity and size. However one thing all these organizations are discovering is that a wealth of strategic value lies in this data and traditional relational database management tools are unable to process them fast enough. Thankfully, in about the same time, several data-management tools have emerged loosely termed as “big data tools”.Primary responsibility to meet and exceed the assigned lead target for Services within a designated territory/industry vertical. From November 2012 to September 2013 (11 months) Bangalore
Introversion (I), Sensing (S), Thinking (T), Perceiving (P)
0 year(s), 10 month(s)
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