John Nash’s Email & Phone

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John Nash

ASIC Design/Verification Consultant @ eASIC

John Nash Contact Details

Location:
San Francisco Bay Area
Work:
ASIC Design/Verification Consultant @ eASIC
Owner @ MJ Logic Design
ASIC Verification Consultant @ Caustic Graphics
Education:
@ University of California, Davis
About:

17+ years of ASIC and FPGA design/verification. Key product areas include storage processors, software-configurable processors, and various networking platforms. Current - Principal at MJ Logic Design, an ASIC/FPGA design/verification consulting group.

ASIC Design/Verification Consultant @ From April 2007 to Present (8 years 9 months) Owner @ From March 2002 to Present (13 years 10 months) ASIC Verification Consultant 

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