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Gopal Iyer

Design Engineering Manager @ Altera

Gopal Iyer Contact Details

San Francisco Bay Area
Design Engineering Manager @ Altera
Bachelor of Engineering @ University of Pune

Gopal Iyer has held various positions in the hardware design engineering industry. His primary responsibilities consist of complete layout ownership of several custom analog blocks, DSP modules, Error correction and coding modules, global internal-customer support for Mixed Signal IPs, development of Testchips and mentoring of young engineers on mixed signal layouts. He has 8 years of experience 

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