N/A, Various mathematics and physics courses (in parallel to military service) @
The Open University of Israel
Highly experienced system architect and software team leader with vast design and implementation knowledge of high performance software for carrier-grade communication systems. Excellent capabilities in system architecture, objected oriented design and implementation (C++, Python) on Linux (including Kernel). Technical expert, leader, mentor and team-player. A focal point of every project throughout my career. Recipient of numerous company
Highly experienced system architect and software team leader with vast design and implementation knowledge of high performance software for carrier-grade communication systems. Excellent capabilities in system architecture, objected oriented design and implementation (C++, Python) on Linux (including Kernel). Technical expert, leader, mentor and team-player. A focal point of every project throughout my career. Recipient of numerous company awards and recognized as top-talent multiple times in various roles. Eager to work and have fun with professionals, while learning new things and significantly contributing to the company.
System architect @ Joined Qwilt at its birth, defining Qwilt's product architecture
Defined product architecture from scratch: system breakdown to components, system level sequences, networking concepts (device physical network insertion and protocol operation), content-control, storage-control, various infrastructures, device management concepts (e.g. configuration model and REST API), remote automated support, device identity (cryptographic keys, certificates) and more.
Defined video caching network architecture for the Streaming Video Alliance (SVA). The architecture is an open, multi-vendor, global solution for the Internet scale. The solution improves network capacity and quality of experience by extending the Content Delivery Networks (CDNs) into the service provider networks. It is composed of caching nodes, various caching controllers, APIs and protocols.
Co-authored a few Qwilt’s patent applications. From May 2010 to Present (5 years 8 months) Software Development Team Leader @ Led and mentored a team of six engineers from specification through object-oriented design, to C++ and Python implementation on Linux.
Amongst the modules developed by the team:
+ Management infrastructure layer providing a generic configuration database, transactional commits with various north bound APIs: CLI, Netconf, SNMP based on ConfD. Automatic generation of C++ & Python code providing a friendly API towards the application processes with local and remote AAA (Authentication, Authorization & Accounting) mechanisms.
+ Content-control – a scalable high performance, very low latency software module that tracks and manages the lifecycle of HTTP transactions and content items. Composed of a core process and agents communicating using Redis and Google Protocol Buffers.
+ Additional features: storage-control (enables seamless disk hot-insertion and failure recovery, manages the RAID controller, Linux mounts and updates the application), management web server (REST API and static files, Django framework over Apache server), device identity framework (per device unique crypto keys, certificates and passwords, highly secured backend server), remote support features (remote job execution, proactive device status notification, hardened SSH support access), logging infrastructure (flexible, high performance, runtime configurable) and many more. From June 2010 to September 2015 (5 years 4 months) Software Technical Leader @ The Cisco ASR router is a billion dollar selling product line encompassing network edge technologies.
Became an expert in the router’s architecture, data path, network processor and development environment in route to adding and improving the router’s layer 7 services. From July 2009 to June 2010 (1 year) Software Technical Leader @ Designed and implemented core software layers and platform infrastructure for Cisco’s Next-gen Service Control Engine (SCE) appliance. The SCE enables ISPs to better control and optimize their network at 40Gbps rates. It is multi-blade embedded system with several dual-core processors running SMP-Linux.
Designed, specified and implemented all low layers including: Linux kernel (drivers, porting), U-Boot and Linux distribution for multi dual-core PowerPC embedded system. Also defined HW/SW interfaces.
Defined and implemented the inter-CPU communication network (over PCIe), internal shared file systems and device startup & shutdown processes.
Lead the software side of the appliance hardware bring-up from board arrival to stable deployment and established a development environment for over 15 people on the project.
Introduced and drove the Linux operating system technology and concepts within the group.
Became key BU Linux knowledge center. From March 2006 to July 2009 (3 years 5 months) System Architect @ Post merger integration project of inserting P-Cube's Service Control technology into the Cisco 7600 router. A Key challenge was to integrate most of the SCE (Service Control Engine) software into the router while quadrupling performance and load balancing between several service blades for a greater system service throughput. Responsibilities included data path integration between the blade and the router, including router traffic diversion and ASIC configuration.
Became a Cisco expert in 7600 router architecture – both data plane as well as data path ASICs.
Designed traffic diversion architecture in the router for the Service Control blade. Addressed various network insertion topologies, load balancing and redundancy even though the router architecture was not designed for such integration. The architecture was.
Specified several router features to enable and enhance the MGSCP (Multi-Gigabit Service Control Platform) solution and supported initial field deployments.
Co-authored Patent No. 7,693,985 – "Technique for dispatching data packets to service control engines". From September 2005 to March 2006 (7 months) Senior Software Engineer @ Joined with P-Cube acquisition
Specified and implemented a major SCE (Service Control Engine) feature, VAS (Value Added Services) traffic diversion. The feature enables ISPs who deployed SCE to sell VAS services like spam filtering to its customers. The SCE diverts the Internet traffic of the entitled subscribers to an array of VAS servers required to scale the solution. The solution offloads traffic from the VAS servers whereas the SCE diverts only relevant portion of the traffic.
Specified, designed and implemented solution in C++ (under VxWorks). Software included performance critical and delicate data path changes, HW/SW integration and control plane changes in the SCE operating system, SCOS. Supported the Dev Test group with testing and integration with 3rd party VAS servers. From September 2004 to September 2005 (1 year 1 month) System Engineer @ Specified and designed Seabridge’s next generation platform, a carrier grade, high-speed (10G) ATM switch/IP router systems. Under my responsibility: 64G-128G Protocol agnostic switching fabric, fast path, network-processor evaluation and selection, switch fabric redundancy, line cards and SDH ports. From March 2002 to March 2004 (2 years 1 month) Software Team Leader @ Led a software team of the first line card, an OC48/STM16 ATM interface card of the ATM/Ethernet switch. Designed and implemented: boot ROM, BSP, drivers, application and mgmt software in C++.
Led a team who specified, designed and implemented a compressed voice over ATM interface card. Developed drivers, protocol, voice processing DSP application and management software in C++ under VxWorks. From May 1999 to May 2002 (3 years 1 month) Hardware Engineer @ Designed and implemented digital processing software for propriety high-speed tactical wireless network modem front end for Text-Instrument C62 DSP, C and Assembler.
Specified, designed and implemented a wireless modem transmitter FPGA From October 1996 to March 1999 (2 years 6 months) Hardware and Software Developer @ Served in an elite military unit (Matzov) that developed propriety data communication systems.
Hardware development of multi-CPU boards and design of data processing FPGA.
Protocol and driver software development at C and Assembly on the project’s proprietary OS. From July 1991 to October 1996 (5 years 4 months)
B.Sc. Electrical Engineering, Electricity, Computers, Cum Laude @ Technion (Israel) From 1996 to 1999 N/A, Various mathematics and physics courses (in parallel to military service) @ The Open University of Israel From 1992 to 1996 Gaash Hazan is skilled in: System Architecture, Object Oriented Design, C++, Python, Software Design, Computer Hardware, Team Leadership, Mentoring, Autodidact, Multithreading, Multiprocessing, Virtualization, TCP/IP, Linux, Broad Vision
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