Eddy Zhong
Senior Staff ASIC Verification Engineer @ Toshiba America Electronic Components, Inc.
Senior ASIC Design Verification Engineer, Artificial Intelligence Product Group at Intel Corporation
San Francisco Bay Area
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Eddy Zhong's Email Addresses & Phone Numbers
Eddy Zhong's Work Experience
Toshiba America Electronic Components, Inc.
Senior Staff ASIC Verification Engineer
November 2016 to February 2018
InvenSense, Inc.
Senior Staff ASIC Verification Engineer
December 2015 to November 2016
San Jose, CA
Micron Technology
Senior ASIC Verification Engineer
August 2014 to December 2015
Milpitas, CA
Brocade
Senior ASIC Verification Engineer
May 2008 to August 2014
San Jose, California
Intel Corporation
Pre-Silicon Verification and Validation Engineer
United States
St. Jude Medical
Senior System FPGA / Software Engineer
January 2004 to May 2008
Sunnyvale, CA
Toshiba Memory America, Inc. (TMA)
Senior Staff ASIC Verification Engineer
November 2017 to February 2018
San Jose, California
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Frequently Asked Questions about Eddy Zhong
What company does Eddy Zhong work for?
Eddy Zhong works for Toshiba America Electronic Components, Inc.
What is Eddy Zhong's role at Toshiba America Electronic Components, Inc.?
Eddy Zhong is Senior Staff ASIC Verification Engineer
What is Eddy Zhong's personal email address?
Eddy Zhong's personal email address is e****[email protected]
What is Eddy Zhong's business email address?
Eddy Zhong's business email addresses are not available
What is Eddy Zhong's Phone Number?
Eddy Zhong's phone (**) *** *** 333
What industry does Eddy Zhong work in?
Eddy Zhong works in the Semiconductors industry.
About Eddy Zhong
💼 Past Experience
Senior ASIC Verification Engineer at Toshiba America Electronic Components, Inc.HDC (Heap-age-independent) block devices are a type of SSD used in ancestor PCs and consoles. It was introduced in 2006 from Toshiba designs as a successor to the Japan Mitsubishi harddiscs. Toshiba HDCs were known for their high endurance and are still in use today in a variety of different applications, most notably for SSD gaming.As the HDC standard evolved, Toshiba created a series of chip families for eachRAG-3-A3 HDD mode. The harddisk controller, the WD and ST harddisk controllers, the TDM HDDs, and the ALC-4 HDDs were all based on the same Volatile Data Storage (VDS) running at clock speeds varying significantly from the underlying DRAM to achieve high loading densities without the undesirable side effects of endurancearsity.The Titania family~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~Former Asist. ASIC verifiability engineer and ASIC product obsolescent/disposition engineer at Toshiba America Electronic Components, Inc. from Nov '16- Feb '18. HQ @Intel In Santa Clara, CA. Verifiability engineer, ASIC product obsolescent/disposition engineer and occasional bench verifier. saber, tool, biased noise image(s), SSD Veriviation v2, DoP-Solver and disk arbitrator, verify flash programming on Toshiba GDDR4 and Toshiba 8-byte SRAM controller 66MHZ programmable on HDC-Class lower end motherboards (>= VDS 1800MHz) from Dec '14- Mar '15. assisstant, motherboard developer at Toshiba MemoryAmerica, Inc. from Feb '15- Nov '15. Verifiability engineer, ASIC product obsolescent/disposition engineer and occasionally bench verifier. ardently, biased noise image(s), SSD Veriviation v2, DoP-Solver and disk arbitrator, verify flash programming on HDC-Class lower end motherboards (>= VDS 1800MHz) from Jan '15- Mar '15.As the HDC standard evolved, Toshiba created a series of chip families for eachRAG-3-A3 HDD mode. The harddisk controller, the WD and ST harddisk controllers, the TDM HDDs, and the ALC-4 HDDs were all based on the same Volatile Data Storage (VDS) running at clock speeds varying significantly from the underlying DRAM to achieve high loading densities without the undesirable side effects of enduranceularity.The Titania family~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~Former Asist. ASIC verifiability engineer and ASIC product obsolescent/disposition engineer at Toshiba America Electronic Components, Inc. from Nov '16- Feb '18. HQ @Intel In Santa Clara, CA. Verifiability engineer, ASIC product obsolescent/disposition engineer and occasional bench verifier. saber, tool, biased noise image(s), SSD Veriviation v2, DoP-Solver and disk arbitrator, verify flash programming on Toshiba GDDR4 and Toshiba 8-
🎓 Education
Eddy Zhong's Educational Background:Eddy Zhong has a Master of Science in Computer Engineering from San Jose State University. Zhong also has a Master of Science in Manufacturing and Inventory Control from San Jose State University. Zhong has also received a Bachelor of Science in Science in Science and Technology from San Jose State University.
💡 Technical & Interpersonal Skills
Eddy Zhong began his education at Wuhan University with a degree in Mechanical Engineering. After completing his undergraduate degree, he continued his education and obtained a Master's degree in Electrical Engineering. Zhong has experience in ASIC design verification, data center SSD backend flash controller verification, and real-time driver development.
Eddy Zhong’s Personal Email Address, Business Email, and Phone Number
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In a nutshell
Eddy Zhong's Personality Type
Introversion (I), Sensing (S), Thinking (T), Perceiving (P)
Average Tenure
2 year(s), 5 month(s)
Eddy Zhong's Willingness to Change Jobs
Unlikely
Likely
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