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Claudio Yanqo

Verification Lead @ Annapurna Labs

Claudio Yanqo Contact Details

Verification Lead @ Annapurna Labs
Verification technical lead @ Intel Corporation
Verification Leader @ Apple

• RTL development in Verilog including module level testing and full chip integration. • Leading Gate Level Simulation environment bring-up as well as debug expert. • Perl script writing for automating processes in pre-silicon verification environment and test creation. • Behavioral Functional Modules writing in VHDL/Verilog/System Verilog • Very tight work with teams abroad including often business 

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