Engineer @ -designed and verified testchips at 20nm and beyond -programmed parametric tester to collect data on testchips -analyzed data to verify the functionality of testchip modules -investigated abnormalities to reach conclusions and feedback result to foundry, process or design engineers -performed STA analysis using Primetime on testchips -performed EM/IR analysis and worked with layout engineers to resolve violations for product tapeout From November 2011 to Present (3 years 10 months) San Francisco Bay AreaSilicon Integration and Validation intern @ Improved stability of multi-FPGA based emulation platform designed to emulate Zynq From January 2011 to August 2011 (8 months) Analog Design Intern @ – Designed a class AB rail to rail amplifier with gm control for the AVR product family. – Reduced gm variation from over 80% to less than 8%. From June 2009 to August 2009 (3 months) Test Engineer Intern @ – Developed automated verification methods to replace existing manual routines. – Worked as part of a team to reduced test time by 600% without loss in test coverage. – Troubleshot failures, gathered and analyzed data and developed resolutions for them. – Performed debug using oscilloscopes, logic analyzers and other lab equipment. – Travelled to testing facility in Asia for one week to assist local contract engineers. From May 2007 to June 2008 (1 year 2 months)

Master of Applied Science, ECE @ The University of British Columbia From 2009 to 2011 Bachelor of Applied Science (BASc) in Engineering Science, Computer @ University of Toronto From 2004 to 2009 Summer exchange student @ Simon Fraser University Chris Wang is skilled in: FPGA, Parallel Programming, Learning Quickly, Microsoft Excel, Windows, Microsoft Office, C, C++, LVS, DRC, Cadence Virtuoso, Perl Script, Unix, Static Timing Analysis, Debugging, Testing, Verilog